TPS76718Q

Input voltage range^(2), V_I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 13.5 V
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VI + 0.3 V
Maximum RESET voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . 16.5 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . Internally limited
Output voltage, V_O (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Continuous total power dissipation . . . . . . . . . . . .  . . See dissipation rating tables
Operating junction temperature range, T_J . . . . . . . . . . . . . . . . . . −40°C to 125°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .....................2 kV

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated onditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network terminal ground.

This TPS76718Q is designed to have a fast transient response and be stable with 10 F low ESR capacitors. hiscombination provides high performance at a reasonable cost.

Because the PMOS device TPS76718Q behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV at an output current of 1 A for the TPS76750) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current of TPS76718Q is very low and independent of output loading (typically 85 A over the full range of output current, 0 mA to 1 A). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family TPS76718Q also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1 A at T_J = 25°C.

The RESET output of the TPS76718Q initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS76718Q monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.

The TPS76718Q is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5.0-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS76718Q is available in 8-pin SOIC and 20-pin PWP packages.