TPS76525

Input voltage range‡, V_I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 13.5 V
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  0.3 V to 16.5 V
Maximum PG voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . 16.5 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Continuous total power dissipation . . . . . . . . . . . . . . . See dissipation rating tables
Output voltage, V_O (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . 7 V
Operating virtual junction temperature range, T_J . . . . . . . . . . . .. 40°C to 125°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . 2 kV

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ All voltage values are with respect to network terminal ground.

This TPS76525 is designed to have an ultra-low quiescent current and be stable with a 4.7-F capacitor. This combination provides high performance at a reasonable cost.
 
Because the PMOS device TPS76525 behaves as a low-value resistor, the dropout voltage is very low (typically 85 mV at an output current of 150 mA for the TPS76550) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current of TPS76525  is very low and independent of output loading (typically 35 A over the full range of output current, 0 mA to 150 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family TPS76525 also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 A (typ).

Power good (PG) of TPS76525  is an active high output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS76525 is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V and 5.0-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.25 V to 5.5 V). Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS76525 is available in 8 pin SOIC package.