TPS74201

· 1.5A LDO Regulator with Programmable Soft-Start (SS)
· SS Pin Provides a Linear Startup with Ramp Time Set by External Capacitor
· Supports Input Voltages as Low as 0.9V
· Adjustable Output (0.8V to 3.3V)
· Ultra-Low Dropout: 50mV at 1.5A (typ)
· 1% Accuracy Over Line, Load, and Temperature
· Stable with Any or No Output Capacitor
· Active High Enable
· Open-Drain Power-Good (5 × 5 QFN)
· Available in 5mm × 5mm × 1mm QFN and DDPAK-7 Packages
· External BIAS Permits Low V_IN Operation with Excellent Transient Response

The TPS74201 low dropout (LDO) linear regulator provides an easy-to-use power management solution for many high-current applications. The user programmed soft-start (SS) input limits inrush current in FPGAs and DSPs. The enable input (EN) and power-good (PG) outputs allow easy sequencing with external regulators. This complete flexibility of TPS74201 permits the user to configure a solution that will meet the sequencling requirements of  FPGAs,DSPs,and other applications with special requirements.

A precision reference and error amplifier TPS74201 deliver 1% accuracy over load, line, temperature, and process. The LDO regulator is stable with any or no output capacitor and is fully specified from 40°C to +125°C. The TPS74201 is offered in a small 5mm * 5mm QFN package, yielding a highly compact total solution size. For applications that require additional power dissipation, the DDPAK (KTW) package of TPS74201 is also available.