Features: ` Dual Output Voltages for Split-Supply pplications
` Independent Enable Functions (See Part umber TPS707xx for Sequenced Outputs)
` Output Current Range of 250 mA on egulator 1 and 125 mA on Regulator 2
` Voltage Options Are 3.3-V/2.5-V, 3.3-V/1.8-V, .3-V/1.5-V, 3.3-V/1.2-V, and Dual Adjustable utputs
` Open Drain Power-On Reset With 120-ms elay
` Open Drain Power Good for Regulator 1 nd Regulator 2
` Fast Transient Response
` Ultralow 190 A (typ) Quiescent Current
` 1 A Input Current During Standby
` Low Noise: 65 VRMS Without Bypass apacitor
` Quick Output Capacitor Discharge Feature
` One Manual Reset Input
` 2% Accuracy Over Load and Temperature
` Undervoltage Lockout (UVLO) Feature
` 20-Pin PowerPAD™ TSSOP Package
` Thermal Shutdown ProtectionSpecificationsInput voltage range‡: VIN1 . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V
VIN2 . . . . . . . . .. . . . . . . . . . . . . . . . . 0.3 V to 7 V
Voltage range at EN1, EN2 . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V
Output voltage range (VOUT1, VSENSE1) . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Output voltage range (VOUT2, VSENSE2) . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
MaximumRESET, PG1, PG2 voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Maximum MR voltage . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . VIN1
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Continuous total power dissipation . . . . . . . . See Dissipation Rating Tables
Operating virtual junction temperature range, TJ . . . . . . . . . 40 to 150
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . 65to 150
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . 2 kV
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and unctional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not mplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ All voltages are tied to network ground.
DescriptionThe TPS708xx is a low-dropout voltage regulator ith integrated SVS (RESET, POR, or power on eset) and power good (PG) functions. TPS708xx are capable of supplying 250 mA and 125 A by regulator 1 and regulator 2 respectively. uiescent current is typically 190 A at full load. ifferentiated features, such as accuracy, fast ransient response, SVS supervisory circuit power on reset), manual reset input, and ndependent enable functions provide a complete ystem solution.
The TPS708xx family of voltage regulators offers very low dropout voltage and dual outputs. TPS708xx have extremely low noise output performance without using any added filter bypass capacitors and are esigned to have a fast transient response and be stable with 10 F low ESR capacitors.
TPS708xx have fixed 3.3-V/2.5-V, 3.3-V/1.8-V, 3.3-V/1.5-V, 3.3-V/1.2-V, and adjustable voltage options. egulator 1 can support up to 250 mA, and regulator 2 can support up to 125 mA. Separate voltage inputs allow he designer to configure the source power.
Because the PMOS TPS708xx behaves as a low-value resistor, the dropout voltage is very low (typically 170 mV n regulator 1) and is directly proportional to the output current. Additionally, since the PMOS pass element is voltage-driven device, the quiescent current is very low and independent of output loading (maximum of 30 A over the full range of output current and full range of temperature). This LDO TPS708xx family also features a sleep ode; applying a high signal to EN1 or EN2 (enable) shuts down regulator 1 or regulator 2, respectively. When high signal is applied to both EN1 and EN2, both regulators are in sleep mode, thereby reducing the input urrent to 2 A at TJ = 25°C.
For each regulator, there is an internal discharge transistor to discharge the output capacitor TPS708xx when the regulator s turned off (disabled).
The PG1 pin reports the voltage condition at VOUT1. The PG1 pin can be used to implement a SVS (RESET, OR, or power on reset) for the circuitry supplied by regulator 1. The PG2 pin reports the voltage conditions t VOUT2. The PG2 pin of TPS708xx can be used to implement a SVS (power on reset) for the circuitry supplied by egulator 2.
The TPS708xx features a RESET (SVS, POR, or power on reset). RESET output initiates a reset in the event f an undervoltage condition. RESET also indicates the status of the manual reset pin (MR). When MR is in the ogic high state, RESETgoes to a high-impedance state after 120 ms delay. To monitor VOUT1, the PG1 output in can be connected to MR. To monitor VOUT2, the PG2 output pin can be connected to MR.
The TPS708xx has an undervoltage lockout UVLO circuit which prevents the internal regulators from turning on until VIN1 reaches 2.5V.
TPS70802 Data Sheet
