Features: · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)· Supply Current of 220 nA (Typ)· Precision Supply Voltage Supervision Range: 1.8 V, 2.5 V, 3 V, 3.3 V· Power-On Reset Generator With Selectable Delay Time of 10 ms or 200 m...
TPS3836E18-EP: Features: · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)· Supply Current of 220 nA (Typ)· Precision Supply Voltage Supervision Ra...
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· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
· Supply Current of 220 nA (Typ)
· Precision Supply Voltage Supervision Range: 1.8 V, 2.5 V, 3 V, 3.3 V
· Power-On Reset Generator With Selectable Delay Time of 10 ms or 200 ms
· Push/Pull RESET Output (TPS3836), RESET Output (TPS3837), or Open-Drain RESET Output (TPS3838)
· Manual Reset
· 5-Pin SOT-23 Package
VDD Supply voltage(2) | 7 V |
All other pins(2) | 0.3 V to 7 V |
IOL Maximum low output current | 5 mA |
IOH Maximum high output current | 5 mA |
IIK Input clamp current (VI < 0 or VI > VDD) | ±10 mA |
IOK Output clamp current (VO < 0 or VO > VDD) | ±10 mA |
TA Operating free-air temperature range | 55 to 125 |
Tstg Storage temperature range | 65 to 150 |
TJ Maximum junction temperature | 150 |
Soldering temperature | 260 |
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND. For reliable operation, the device must not be continuously operated at 7 V for more than t = 1000 h.
TPS3836E18-EP supervision, primarily for digital signal processing (DSP) and processor-based systems.
During power on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDD and keeps RESET output active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDD has risen above VIT. When CT is connected to GND, a fixed delay time of typical 10 ms is asserted. When connected to VDD, the delay time of TPS3836E18-EP is typically 200 ms.