TPS3824-xx

Features:

Power-On Reset Generator With Fixed
   Delay Time of 200 ms (TPS3823/4/5/8) or 25 ms (TPS3820)
Manual Reset Input (TPS3820/3/5/8)
Reset Output Available in Active-Low (TPS3820/3/4/5), Active-High (TPS3824) and Open-Drain (TPS3828)
Supply Voltage Supervision Range  2.5 V, 3 V, 3.3 V, 5 V
Watchdog Timer (TPS3820/3/4/8) Supply Current of 15 A (Typ)
SOT23-5  Package Temperature Range ...40°C to 85°C


Application

Applications Using DSPs, Microcontrollers,or Microprocessors
Industrial Equipment
Programmable Controls
Automotive Systems
Portable/Battery-Powered Equipment
Intelligent Instruments
Wireless Communications Systems
Notebook/Desktop Computers
    

Pinout




Specifications

Supply voltage, V_DD  (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 V
RESET, RESET, MR, WDI (see Note 1)  . . . . . . . . .  0.3 V to (V_DD  + 0.3 V)
Maximum low output current, I_OL     . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA
Maximum high output current, I_OH   . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA
Input clamp current range, I_IK (V_I < 0 or V_I > V_DD )   . . . . . . . . . . . ±10 mA   
Output clamp current range, I_OK  (V_O  < 0 or V_O   > V_DD )  . . . . . .  ± 10 mA
Continuous total power dissipation  . . . . . . . . . . .See Dissipation Rating Table
Operating free-air temperature range, T_A   . . . . . . . . . . . 40 °C to 85 °C 
Storage temperature range, T_stg   . . . . . . . . . . . . . . . . . 65 °C to 150°C 
Soldering temperature  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .   260°C 


Description

The TPS3824-xx supervisors provides circuit initialization and timing supervision, primarily for DSP and processor-based systems.

During power-on, RESET  of TPS3824-xx is asserted when supply voltage V_DD becomes higher than 1.1 V.Thereafter, the supply voltage supervisor moni- tors V_DD  and keeps RESET active as long as V_DD remains below the threshold voltage V_IT.An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, t_d , starts after V_DD has risen above the threshold voltage V_IT. When the supply voltage drops below the threshold voltage V_IT, the output becomes active (low) again. No external components are required. TPS3824-xx have a fixed-sense threshold voltage V_ITset by an internal voltage divider.