TPS2056D

The TPS2056D is one member of the TPS2056 series.The TPS2056D dual power-distribution switche is intended for applications where heavy capacitive loads and short circuits are likely.These TPS2056D devices incorporate in single packages two 135-mW N-channel MOSFET high-side power switches for power-distribution systems that require multiple power switches. Each switch is controlled by a logic enable compatible with 5-V and 3-V logic. Gate drive is provided by an internal charge pump that controls the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.

Features of the TPS2056D are:(1)135-mW  -maximum (5-V Input) high-side MOSFET switch; (2)250 mA continuous current per channel; (3)independent short-circuit and thermal protection with overcurrent logic output; (4)operating range:2.7-V to 5.5-V; (5)logic-level enable input; (6)2.5-ms typical rise time; (7)undervoltage lockout; (8)10 m A maximum standby supply current; (9)bidirectional switch; (10)available in 8-pin SOIC and PDIP packages; (11)2-kV human-body-model, 200-V machine-model ESD protection.

The absolute maximum ratings of the TPS2056D can be summarized as:(1)input voltage range:0.3 V to 6 V;(2)output voltage range:0.3 V to Vi(in)+ 0.3 V;(3)storage temperature:-65 to 150;(4)lead temperature (soldering 5s):300;(5)operating virtual junction temperature range:-40 to 125.Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant current mode and holds the current constant while varying the voltage on the load.