Features: Low rDS(on) ...5 Avalanche Energy ...30 mJ Eight Power DMOS-Transistor Outputs of150-mA Continuous Current 500-mA Typical Current-Limiting Capability Output Clamp Voltage . . . 50 V Enhanced Cascading for Multiple Stages All Registers Cleared With Single Input Low Power ConsumptionPi...
TPIC6B596: Features: Low rDS(on) ...5 Avalanche Energy ...30 mJ Eight Power DMOS-Transistor Outputs of150-mA Continuous Current 500-mA Typical Current-Limiting Capability Output Clamp Voltage . . . 50 V En...
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Low rDS(on) ...5
Avalanche Energy ...30 mJ
Eight Power DMOS-Transistor Outputs of150-mA Continuous Current
500-mA Typical Current-Limiting Capability
Output Clamp Voltage . . . 50 V
Enhanced Cascading for Multiple Stages
All Registers Cleared With Single Input
Low Power Consumption
The TPIC6B596 is a monolithic, high-voltage, medium-current power 8-bit shift register designed for use in systems that require relatively high load power. The TPIC6B596 device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other mediumcurrent or high-voltage loads.
This TPIC6B596 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shiftregister clear (SRCLR) is high. When SRCLR is low, all registers in the device are cleared. When output enable (G) is held high, all data in the
output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. When data in the output buffers is low, the DMOStransistor outputs are off. When data is high, the DMOS-transistor outputs have sink-current capability. The serial output (SER OUT) is clocked out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference.
Outputs of TPIC6B596 are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous sinkcurrent capability. Each output provides a 500-mA typical current limit at TC = 25°C. The current limit decreases as the junction temperature increases for additional device protection.
The TPIC6B596 is characterized for operation over the operating case temperature range of 40°C to 125°C.