Features: Low rDS(on) . . . 1.3 Typ
Avalanche Energy . . . 75 mJ
Eight Power DMOS Transistor Outputs of 250-mA Continuous Current
1.5-A Pulsed Current Per Output
Output Clamp Voltage at 45 V
Enhanced Cascading for Multiple Stages
All Registers Cleared With Single Input
Low Power Consumption
Pinout
SpecificationsLogic supply voltage, VCC (see Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Logic input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .0.3 V to 7 V
Power DMOS drain-to-source voltage, VDS (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . .45 V
Continuous source-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Pulsed source-drain diode anode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 2 A
Pulsed drain current, each output, all outputs on, IDn, TA = 25°C (see Note 3) . . . . . .750 mA
Continuous drain current, each output, all outputs on, IDn, TA = 25°C . . . . . . . . . . . . 250 mA
Peak drain current single output, IDM, TA = 25°C (see Note 3) . . . . . . .. . . . . . . . . . . . . . .2 A
Single-pulse avalanche energy, EAS (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 75 mJ
Avalanche current, IAS (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Continuous total power dissipation . . . . . . . . . . . . . . . .. . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . .40°C to 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . . . . . . .. . . . . . . . . . . . 60°C DescriptionThe TPIC6596 is a monolithic, high-voltage, highcurrent power 8-bit shift register designed for use in systems that require relatively high load power. The TPIC6596 device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads.
This TPIC6596 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. The storage register transfers data to the output buffer when shiftregister clear (SRCLR) is high. When SRCLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. The serial output (SER OUT) allows for cascading of the data from the shift register to additional devices.
Outputs of TPIC6596 are low-side, open-drain DMOS transistors with output ratings of 45 V and 250-mA continuous sink current capability. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is high, the DMOS-transistor outputs have sink current capability.
Separate power and logic level ground pins are provided to facilitate maximum system flexibility. Pins 1, 10, 11, and 20 are internally connected, and each pin must be externally connected to the power system ground in order to minimize parasitic inductance. A single-point connection between pin 19, logic ground (LGND), and pins 1, 10, 11, and 20, power grounds (PGND), must be externally made in a manner that reduces crosstalk between the logic and load circuits.The TPIC6595 is characterized for operation over the operating case temperature range of 40°C to 125°C.
TPIC6596 Data Sheet
