PinoutSpecificationsDrain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .60 VSource-to-GND voltage (Q1, Q2, and Q3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .100 VDrain-to-GND voltage (Q1, Q2, a...
TPIC5621L: PinoutSpecificationsDrain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .60 VSource-to-GND voltage (Q1, Q2, and Q3) . . . . . ...
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The TPIC5621L is a monolithic logic-level power DMOS-transistor array that consists of six N-channel enhancement-mode DMOS transistors, three of which are configured with a common source.
The TPIC5621L is offered in a wide-body surfacemount (DW) package and is characterized for operation over the case temperature range of 40°C to 125°C.