Features: 4-Channel Serial-in Parallel-in Low-Side Pre-FET DriverDevices Are CascadableInternal 55-V Inductive Load Clamp and VGS Protection Clamp for External Power FETsIndependent Shorted-Load/Short-to- Battery Fault Detection on All Drain TerminalsIndependent OFF-State Open-Load Fault SenseOver...
TPIC44L01: Features: 4-Channel Serial-in Parallel-in Low-Side Pre-FET DriverDevices Are CascadableInternal 55-V Inductive Load Clamp and VGS Protection Clamp for External Power FETsIndependent Shorted-Load/Sho...
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The TPIC44L01, TPIC44L02, and TPIC44L03 are low-side predrivers that provide serial and parallel input interfaces to control four external FET power switches such as offered in the TIE TPIC family of power arrays. These devices are designed primarily for low-frequency switching, inductive load applications such as solenoids and relays. Fault status for each channel is available in a serial-data format. Each driver channel of TPIC44L01, TPIC44L02, and TPIC44L03 has independent off-state open-load detection and on-state shorted-load/short-to-battery detection. Battery overvoltage and undervoltage detection and shutdown is provided on the TPIC44L01/L02. On the TPIC44L03 driver, only over-battery-voltage shutdown is provided Each channel also provides inductive-voltage-transient protection for the external FET.
These TPIC44L01, TPIC44L02, and TPIC44L03 devices provide control of output channels through a serial input interface or a parallel input interface. A command to enable the output from either interface enables the respective channels gate output to the external FET. The serial interface is recommended when the number of signals between the control device and the predriver must be minimized and the speed of operation is not critical. In applications where the predriver must respond very quickly or asynchronously, the parallel input interface is recommended.
For serial operation of TPIC44L01, TPIC44L02, and TPIC44L03, the control device must transition CS from high to low to activate the serial input interface. When this occurs, SDO is enabled, fault data is latched into the serial interface, and the fault flag is refreshed.
Data of TPIC44L01, TPIC44L02, and TPIC44L03 is clocked into the serial registers on low-to-high transitions of SCLK through SDI. Each string of data must consist of at least four-bits of data. In applications where multiple devices are cascaded together, the string of data must consist of4 bits for each device. A high data bit turns the respective output channel on and a low data