Features: Serial Control With DiagnosticsSix Power DMOS Transistor Outputs of 350-mA Continuous CurrentInternal 60-V Inductive Load ClampIndependent ON-State Shorted-Load/Short-to-Battery Fault Detection on All Drain TerminalsIndependent OFF-State Open-Load Fault Sense on All Drain TerminalsTransi...
TPIC2603: Features: Serial Control With DiagnosticsSix Power DMOS Transistor Outputs of 350-mA Continuous CurrentInternal 60-V Inductive Load ClampIndependent ON-State Shorted-Load/Short-to-Battery Fault Dete...
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The TPIC2603 is a monolithic low-side driver which provides serial interface and diagnostics to control six on-board power DMOS switches. Each channel
has independent OFF-state open-load sense, ON-state shorted-load/short-to-battery protection, over-battery-voltage-lockout protection, and over-temperature sense with fault status reported through the serial interface. The TPIC2603 device also provides inductive voltage transient protection for each drain output. The TPIC2603 drives inductive and resistive loads such as relays, valves, and lamps.
Serial data input (SDI) of TPIC2603 is transferred through the serial register when CS is low on low-to-high transitions of the serial clock (SCLK). Each string of data must consist of 8 or 16 bits of data. A logic high input data bit turns the respective output channel ON and a logic low data bit turns it OFF. CS must be transited high after all of the serial data has been clocked into the device. A low-to-high transition of CS transfers the last six bits of serial data to the output buffer, places the serial data out (SDO) terminal in a high-impedance state, and re-enables the fault register. Fault data for the device is sent out the SDO terminal. The first bit of the shift register is exclusively ORed with the fault registers. When a fault exists, the SDI data is inverted as it is transferred out of SDO. Fault data consists of fault flags for over-temperature (bit 6) and shorted/open-load (bits 0-5) for each of the six output channels. Fault register bits are set or cleared asynchronously, when CS is high to reflect the current state of the hardware. The fault must be present when CS is transited from high to low to be captured and reported in the serial fault data. New faults cannot be captured in the serial register when CS is low.