TP3051

The TP3051 family consists of a -law and A-law monolithic PCM CODEC/filter set utilizing the A/D and D1A conversion architecture shown in Figure 1 and a parallel I/O data bus intertace.The devices are fabricated using National's advanced double poly microCMOS process.The transmit section consists of an input gain adjust amplifier, an active RC pre-filter, and a switched-capacitor bandpass filter that rejects signals below 200 Hz and above 3400 Hz. A compressing codsr samples the filtered signal and encodes it in the -255 law or A-taw PCM format. Auto-zero circuitry is included on-chip. The receive section can-lists of an expanding decoder which reconstructs the analog signal from the compressed p.-law or A-law code, and a low pass filter which corcects for the sin x!x response of the decoder output and rejects signals above 3400 Hz.The receive output is a single-ended power amplifier capable of driving low impedance loads.

Features of the TP3051 are:(1)transmit high pass and low pass filtering; (2)receive low pass filter with sin xlx correction; (3)receive power amplifier; (4)active RC noise filters; (5)-255 law COder and DECode---TP3051; (6)internal precision voltage reference; (7)internal auto-zero circuitry; (8)meets or exceeds all LSSGR and CCITT specifications; (9)±5V operation; (10)low operating power-typically 60 mW; (11)power-down standby mode-typically 3 mW; (12)high speed TRI-STATE data bus; (13)2 loopback test modes.

The absolute maximum ratings of the TP3051 can be summarized as:(1)GNDD to GNDA:±0.3V;(2)Vcca or GNDD or GNDA:7V;(3)Vbb to GNDD or GNDA:-7V;(4)storage temperature:-65 to 150;(5)voltage at any analog input or output:Vcc+0.3 to Vbb-0.3V;(6)voltage at any analog input or output:Vcc+0.3 to GNDD-0.3V;(7)operating temperature:-25 to 125.Since one of three distinct clock frequencies may be used, the actual frequency must be known by the device for proper operation of the switched-capacitor filters. This is achieved by writing conlrol register bits CO and C1,normally in the same WRITE cycle that powers-up the device, and before any PGM data transfers take place.In the analog loopback mode, the transmit filter input is switched from the gain adjust amplifier to the receive power amplifier output, forming a unity-gain loop from the receive register back to the transmit register. This mode of TP3051 is entered by setting control register bits G2 to 0 and C3 to 1.The receive power amplifier continues to drive the load in this mode.