TMC2249A

Features: • 60 MHz input and computation rate• Two 12-bit multipliers• Separate data and coefficient inputs• Independent, user-selectable pipeline delays of 1 to 16 clocks on all input ports• Separate 16-bit input port allows cascading or addition of a constant&...

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TMC2249A Picture
SeekIC No. : 004523547 Detail

TMC2249A: Features: • 60 MHz input and computation rate• Two 12-bit multipliers• Separate data and coefficient inputs• Independent, user-selectable pipeline delays of 1 to 16 clo...

floor Price/Ceiling Price

Part Number:
TMC2249A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/11

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Product Details

Description



Features:

• 60 MHz input and computation rate
• Two 12-bit multipliers
• Separate data and coefficient inputs
• Independent, user-selectable pipeline delays of 1 to 16  clocks on all input ports
• Separate 16-bit input port allows cascading or addition of  a constant
• User-selectable rounded output
• Internal 1/2 LSB rounding of products
• Fully registered, pipelined architecture
• Available in 120-Pin CPGA, PPGA, MPGA or MQFP



Application

• Video switching
• Image mixing
• Digital signal modulation
• Complex frequency synthesis
• Digital filtering
• Complex arithmetic functions



Pinout

  Connection Diagram




Specifications

Parameter
Min
Max
Unit
Supply Voltage
-0.5
7.0
V
Input Voltage
-0.5
VDD + 0.5
V
Applied Voltage (Output) 2
-0.5
VDD + 0.5
V
Externally Forced Current (Output) 3,4
-3.0
6.0
mA
Output Short Circuit Duration (single output in HIGH state to ground)
1
sec
Operating, Ambient Temperature
-20
110
°C
Operating,Junction Temperature
140
°C
Storage Temperature
-65
150
°C
Lead, Soldering (10 seconds)
150
°C



Description

The TMC2249A is a high-speed digital arithmetic circuit  consisting of two 12-bit multipliers, an adder and a cascade- able accumulator. All four multiplier inputs are simulta- neously accessible to the user, and each includes a user- programmable pipeline delay of up to 16 clocks in length.  The 24-bit adder/subtractor is followed by an accumulator  and 16-bit input port which allows the user to cascade multi- ple TMC2249As. A new 16-bit accumulated output is avail-able every clock, up to the maximum rate of 60 MHz. All  nputs and outputs are registered except the three-state out- put enable, and all are TTL compatible. 


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