Features: • Fully integrated acquisition• 3-channel video input multiplexer• Two-stage (analog and digital) video clamp• Automatic gain adjustment• Sync detection and separation• Pixel and subpixel adjustment of video-to-sync output timing• Genlock to any...
TMC2072: Features: • Fully integrated acquisition• 3-channel video input multiplexer• Two-stage (analog and digital) video clamp• Automatic gain adjustment• Sync detection and s...
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Parameter |
Min |
Max |
Unit |
Power Supply Voltage |
-0.5 |
7.0 |
V |
Input Voltage |
-0.5 |
VDD + 0.5 |
V |
Digital Outputs | |||
Applied Voltage2 |
-0.5 |
VDD + 0.5 |
V |
Forced Current3,4 |
-6.0 |
6.0 |
mA |
Short Circuit Duration (single output in HIGH state to GND) |
1 |
sec | |
Temperature | |||
Operating, Case |
-20 |
130 |
°C |
Operating, Junction |
150 |
°C | |
Lead Soldering (10 seconds) |
300 |
°C | |
Vapor Phase Soldering (1 minute) |
220 |
°C | |
Storage |
-65 |
150 |
°C |
The TMC2072 Genlocking Video Digitizer samples and quantizes standard analog baseband composite NTSC or PAL video into its 8-bit digital equivalent. It extracts horizontal and vertical sync signals, from which an on-chip PLL generates a line-locked pixel clock for the on-chip 8-bit A/D converter and a double-speed register clock to transfer data to a subsequent video processing subsystem. A second PLL generates a chroma subcarrier locked to the incoming chroma burst. The chip reports each line's color burst phase and frequency during the next horizontal sync pulse.
The TMC2072 includes a three-channel video input multi-plexer, analog clamp, variable gain amplifier, and digital back porch clamp. The user may provide ither an external 20MHz clock or a 20MHz crystal. No external component changes or tuning are required for PAL or NTSC operation at either D1 or square pixel VGA pixel rates.
The TMC2072 is fabricated in a submicron CMOS process and is packaged in a 100-lead MQFP. Its performance is guaranteed from 0 to 70°C.