TM2SR72EPU

Features: ` Organization TM2SR72EPU . . . 2097152 x 72 Bits TM4SR72EPU . . . 4194304 x 72 Bits` Single 3.3-V Power Supply (±10% Tolerance)` Designed for 66-MHz 4-Clock Systems ` JEDEC 168-Pin Dual-In-Line Memory Module (DIMM) Without Buffer for Use With Socket` TM2SR72EPU - Uses Nine 16M-Bit Syn...

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SeekIC No. : 004523292 Detail

TM2SR72EPU: Features: ` Organization TM2SR72EPU . . . 2097152 x 72 Bits TM4SR72EPU . . . 4194304 x 72 Bits` Single 3.3-V Power Supply (±10% Tolerance)` Designed for 66-MHz 4-Clock Systems ` JEDEC 168-Pin Dual...

floor Price/Ceiling Price

Part Number:
TM2SR72EPU
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/11

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Product Details

Description



Features:

` Organization TM2SR72EPU . . . 2097152 x 72 Bits TM4SR72EPU . . . 4194304 x 72 Bits
` Single 3.3-V Power Supply (±10% Tolerance)
` Designed for 66-MHz 4-Clock Systems
` JEDEC 168-Pin Dual-In-Line Memory Module (DIMM) Without Buffer for Use With Socket
` TM2SR72EPU - Uses Nine 16M-Bit Synchronous Dynamic RAMs (SDRAMs) (2M * 8-Bit) in Plastic Thin Small-Outline Packages (TSOPs)
` TM4SR72EPU - Uses 18 16M-Bit SDRAMs (2M * 8-Bit) in Plastic TSOPs
` Performance Ranges:
` High-Speed, Low-Noise Low-Voltage TTL (LVTTL) Interface
` Byte-Read/Write Capability
` Read Latencies 2 and 3 Supported
` Support Burst-Interleave and Burst-Interrupt Operations
` Burst Length Programmable to 1, 2, 4, and 8
` Two Banks for On-Chip Interleaving (Gapless Access)
` Ambient Temperature Range 0°C to 70°C
` Gold-Plated Contacts
` Pipeline Architecture
` Serial Presence-Detect (SPD) Using EEPROM




Pinout

  Connection Diagram


Specifications

Supply voltage range, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Voltage range on any pin (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Short-circuit output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Power dissipation: TM2SR72EPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 W
TM4SR72EPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 W
Ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C


† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to VSS.




Description

The TM2SR72EPU is a 16M-byte, 168-pin dual-in-line memory module (DIMM). The DIMM is composed of nine TMS626812DGE, 2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic thin small-outline package (TSOP) mounted on a substrate with decoupling capacitors. See the TMS626812 data sheet (literature number SMOS687).
"
The TM2SR72EPU is a 32M-byte, 168-pin DIMM. The DIMM is composed of eighteen TMS626812DGE, 2097152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling capacitors. See the TMS626812 data sheet (literature number SMOS687).




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