Features: ` Organization TM2xJ64xPN-xx . . . 2097152 * 64 Bits` Single 3.3-V Power Supply (±10% Tolerance)` JEDEC 144-Pin Small Outline Dual-In-Line Memory Module (SODIMM) Without Buffer for Use With Socket` TM2xJ64xPN-xx - Utilizes Eight 16M-Bit (2M*8-Bit) Dynamic RAMs in TSOPs` Performance rang...
TM2EJ64EPN: Features: ` Organization TM2xJ64xPN-xx . . . 2097152 * 64 Bits` Single 3.3-V Power Supply (±10% Tolerance)` JEDEC 144-Pin Small Outline Dual-In-Line Memory Module (SODIMM) Without Buffer for Use Wi...
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Features: ` Organization TM2EP64DxN . . . 2097152 * 64 Bits TM2EP72DxN . . . 2097152 * 72 Bits ...
Features: ` Organization TM2EP64DxN . . . 2097152 * 64 Bits TM2EP72DxN . . . 2097152 * 72 Bits ...
Features: ` Organization TM2EP64DxN . . . 2097152 * 64 Bits TM2EP72DxN . . . 2097152 * 72 Bits ...
` Organization TM2xJ64xPN-xx . . . 2097152 * 64 Bits
` Single 3.3-V Power Supply (±10% Tolerance)
` JEDEC 144-Pin Small Outline Dual-In-Line Memory Module (SODIMM) Without Buffer for Use With Socket
` TM2xJ64xPN-xx - Utilizes Eight 16M-Bit (2M*8-Bit) Dynamic RAMs in TSOPs
` Performance ranges ACCESS ACCESS ACCESS EDO TIME TIME TIME CYCLE tRAC tCAC tAA tHPC MAX MAX MAX MIN '2xJ64xPN-50 50 ns 13 ns 25 ns 20 ns '2xJ64xPN-60 60 ns 15 ns 30 ns 25 ns '2xJ64xPN-70 70 ns 18 ns 35 ns 30 ns
` High-Speed, Low-Noise LVTTL Interface
` Long Refresh Period: TM2EJ64DPN: 32 ms (2048 cycles) TM2EJ64EPN: 64 ms (4096 cycles)
` Low-Power, Battery-Backup Refresh Available: TM2FJ64DPN: 128 ms (2048 cycles) TM2FJ64EPN: 128 ms (4096 cycles)
` 3-State Output
` Extended-Data-Out (EDO) Operation With CAS-Before-RAS (CBR), RAS-Only, and Hidden Refresh
` Serial Presence-Detect (SPD) Using EEPROM
` Ambient Temperature Range 0°C to 70°C
` Gold-Plated Contacts
Supply voltage range, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Voltage range on any pin (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Short-circuit output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Power dissipation: TM2xP64DPN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 W
TM2xP64EPN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 W
Ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS.
The TM2EJ64DPN is a 16M-byte, 144-pin, small outline dual-in-line memory module (SODIMM). The SODIMM is composed of eight TMS427809A, 2097152 × 8-bit 2K-refresh EDO dynamic random-access memories (DRAMs), each in a 400-mil, 28-pin plastic thin small-outline package (TSOP) (DGC suffix) mounted on a substrate with decoupling capacitors. See the TMS427809A data sheet (literature number SMKS894).
The TM2EJ64EPN is an 16M-byte, 144-pin SODIMM. The SODIMM is composed of eight TMS426809A, 2097152 × 8-bit 4K-refresh EDO DRAMs, each in a 400-mil, 28-pin plastic TSOP (DGC suffix) mounted on a substrate with decoupling capacitors. See the TMS426809A data sheet (literature number SMKS894). The TM2FJ64DPN is a 16M-byte, 144-pin SODIMM. The SODIMM is composed of eight TMS427809AP, 2097152 × 8-bit 2K low-power battery-backup refresh EDO DRAMs, each in a 400-mil, 28-pin plastic TSOP (DGC suffix) mounted on a substrate with decoupling capacitors. See the TMS427809AP data sheet (literature number SMKS894).
The TM2FJ64EPN is a 16M-byte, 144-pin SODIMM. The SODIMM is composed of eight TMS426809AP, 2097152 × 8-bit 4K low-power battery-backup refresh EDO DRAMs, each in a 400-mil, 28-pin plastic TSOP (DGC suffix) mounted on a substrate with decoupling capacitors. See the TMS426809AP data sheet (literature number SMKS894).