DAC (D/A Converters) 2.7-5.5V 12-Bit
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Number of Converters : | 4 | Number of DAC Outputs : | 4 | ||
Conversion Rate : | 102 KSPs | Resolution : | 12 bit | ||
Interface Type : | QSPI, SPI, Serial (3-Wire, 4-Wire, Microwire) | Settling Time : | 20 us | ||
Maximum Operating Temperature : | + 85 C | Mounting Style : | SMD/SMT | ||
Package / Case : | DIESALE-16 | Packaging : | Tube |
UNIT | |
Supply voltage, (DVDD, AVDD to GND) |
7 V |
Supply voltage difference, (AVDD to DVDD) |
−2.8 V to 2.8 V |
Digital input voltage range |
−0.3 V to DVDD + 0.3 V |
Reference input voltage range |
−0.3 V to AVDD + 0.3 V |
Operating free-air temperature range, TA |
−40°C to 85°C |
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The TLV5614IYE is a quadruple 12-bit voltage output digital-to-analog converter (DAC) with a flexible 4-wire serial interface. The serial interface allows glueless interface to TMS320, SPI, QSPI, and Microwire serial ports. The TLV5614IYE is programmed with a 16-bit serial word comprised of a DAC address, individual DAC control bits, and a 12-bit DAC value.
The TLV5614IYE has provision for two supplies: one digital supply for the serial interface (via pins DVDD and DGND), and one
for the DACs, reference buffers, and output buffers (via pins AVDD and AGND). Each supply is independent of the other,
and can be any value between 2.7 V and 5.5 V. The dual supplies allow a typical application where the DAC is controlled via a microprocessor operating on a 3 V supply (also used on pins DVDD and DGND), with the DACs operating on a 5 V supply. Of course, the digital and analog supplies can be tied together.
The resistor string output voltage of TLV5614IYE is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class AB output stage to improve stability and reduce settling time. A rail-to-rail output stage and a power-down mode makes it ideal for single voltage, battery based applications. The settling time of the DAC is programmable to allow the designer to optimize speed versus power dissipation. The settling time of TLV5614IYE is chosen by the control bits within the 16-bit serial input string. A
high-impedance buffer is integrated on the REFINAB and REFINCD terminals to reduce the need for a low source impedance drive to the terminal. REFINAB and REFINCD allow DACs A and B to have a different reference voltage then DACs C and D.
The TLV5614IYE is implemented with a CMOS process and is available in a 16-terminal WCS package. The TLV5614IYE is characterized for operation from −40°C to 85°C in a wire-bonded small outline (SOIC) package.