TLK1201RCP

Product : Ethernet Transceivers
Number of Transceivers : 1
Maximum Operating Temperature : + 70 C
Packaging : Tray
Package / Case : HTQFP-64
Standard Supported : IEEE 802.3
Data Rate : 1.3 Gbps
Supply Voltage - Max : 2.7 V
Supply Voltage - Min : 2.3 V
Supply Current (Max) : 90 mA


Features:

0.6-Gbps to 1.3-Gbps Serializer/Deserializer
Low Power Consumption <200 mW at 1.25 Gbps
LVPECL Compatible Differential I/O on High Speed Interface
Single Monolithic PLL Design
Support For 10-Bit Interface or Reduced Interface 5-Bit DDR (Double Data Rate) Clocking
Receiver Differential Input Thresholds 200 mV Minimum
IEEE 802.3 Gigabit Ethernet Compliant
ANSI X3.230-1994 (FC-PH) Fibre Channel Compliant
Advanced 0.25-m CMOS Technology
No External Filter Capacitors Required
Comprehensive Suite of Built-In Testability
IEEE 1149.1 JTAG Support
2.5-V Supply Voltage for Lowest Power Operation
3.3-V Tolerant on LVTTL Inputs
Hot Plug Protection
64-Pin VQFP With Thermally Enhanced Package (PowerPAD)
CPRI Data Rate Compatible (614 Mbps and 1.22 Gbps)
Industrial Temperature Range Supported: −40°C to 85°C

Pinout

Specifications

Supply voltage, V_DD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 3 V
Input voltage range at TTL terminals, V_I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.5 V to 4 V
Input voltage range at any other terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V_DD +0.3 V
Storage temperature, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Electrostatic discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CDM: 1 kV, HBM:2 kV
Characterized free-air operating temperature range: TLK1201 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

Description

The TLK1201RCP gigabit ethernet transceiver provides for ultrahigh-speed, full-duplex, point-to-point data transmissions. The TLK1201RCP is based on the timing requirements of the 10-bit interface specification by the IEEE 802.3 gigabit ethernet specification and is also compliant with the ANSI X3.230-1994 (FC-PH) fibre channel standard. The device supports data rates from 0.6 Gbps to 1.3 Gbps.

The primary application of the TLK1201RCP is to provide building blocks for point-to-point baseband data transmission over controlled impedance media of 50 or 75 . The transmission media can be printed-circuit board traces,copper cables, or fiber-optical media. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The TLK1201RCP performs the data serialization, deserialization, and clock extraction functions for a physical layer interface device. The transceiver operates at 1.25 Gbps (typical), providing up to 1 Gbps of data bandwidth over a copper or optical media interface.

The TLK1201RCP supports both the defined 10-bit interface (TBI) and a reduced 5-bit interface utilizing double data rate (DDR) clocking. In the TBI mode the serializer/deserializer (SERDES) accepts 10-bit wide 8b/10b parallel encoded data bytes. The parallel data bytes are serialized and transmitted differentially at PECL compatible voltage levels. The SERDES extracts clock information from the input serial stream and deserializes the data,outputting a parallel 10-bit data byte.

In the DDR mode the parallel interface accepts 5-bit wide 8b/10b encoded data aligned to both the rising and falling edge of the reference clock. The data is clocked most significant bit first, (bits 0 − 4 of the 8b/10b encoded data) on the rising edge of the clock and the least significant bits (bits 5 − 9 of the 8b/10b encoded data) are clocked on the falling edge of the clock.

The TLK1201RCP provides a comprehensive series of built-in tests for self-test purposes including loopback and pseudorandom binary sequence (PRBS) generation and verification. An IEEE 1149.1 JTAG port is also supported.

The TLK1201RCP is housed in a high-performance, thermally enhanced, 64-pin VQFP PowerPAD package. Use of the PowerPAD package does not require any special considerations except to note that the PowerPAD, which is an exposed die pad on the bottom of the device, is a metallic thermal and electrical conductor. TLK1201RCP is recommended that the device's PowerPAD be soldered to the thermal land on the board.

The TLK1201RCP is characterized for operation from −0°C to 70°C (TLK1201), or −40°C to 85°C (TLK1201I).

The TLK1201RCP uses a 2.5-V supply. The I/O section is 3.3-V compatible. With a 2.5-V supply the chipset is very power-efficient, dissipating less than 200 mW typical power when operating at 1.25 Gbps.

The TLK1201RCP is designed to be hot plug capable. A power-on reset causes RBC0, RBC1, the parallel output signal terminals, TXP, and TXN to be held in a high-impedance state.

Parameters:

Technical/Catalog Information	TLK1201RCP
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Number of Drivers/Receivers	1/1
Type	Transceiver
Voltage - Supply	2.3 V ~ 2.7 V
Package / Case	64-HVQFP
Packaging	Tray
Protocol	IEEE 802
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	TLK1201RCP TLK1201RCP