TLC551

Features: · Very Low Power Consumption 1 mW Typ at VDD = 5 V· Capable of Operation in Astable Mode· CMOS Output Capable of Swinging Rail to Rail· High Output-Current Capability Sink 100 mA Typ Source 10 mA Typ· Output Fully Compatible With CMOS, TTL, and MOS· Low Supply Current Reduces Spikes Duri...

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TLC551 Picture
SeekIC No. : 004520662 Detail

TLC551: Features: · Very Low Power Consumption 1 mW Typ at VDD = 5 V· Capable of Operation in Astable Mode· CMOS Output Capable of Swinging Rail to Rail· High Output-Current Capability Sink 100 mA Typ Sourc...

floor Price/Ceiling Price

Part Number:
TLC551
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/11

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Product Details

Description



Features:

· Very Low Power Consumption 1 mW Typ at VDD = 5 V
· Capable of Operation in Astable Mode
· CMOS Output Capable of Swinging Rail to Rail
· High Output-Current Capability Sink 100 mA Typ Source 10 mA Typ
· Output Fully Compatible With CMOS, TTL, and MOS
· Low Supply Current Reduces Spikes During Output Transitions
· Single-Supply Operation From 1 V to 15 V
· Functionally Interchangeable With the NE555; Has Same Pinout
· ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015.2



Pinout

  Connection Diagram


Specifications

Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 V
Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 to VDD
Sink current, discharge or output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150 mA
Source current, output, IO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . .260°C



Description

The TLC551 is a monolithic timing circuit fabricated using the TI LinCMOSTM process. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2 MHz. Compared to the NE555 timer, this TLC551 uses smaller timing capacitors because of its high input impedance. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltage.

Like the NE555, the TLC551 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) of TLC551 can override all other inputs and can be used to initiate a new timing cycle. If RESET is low, the flip-flop TLC551 is reset and the output is low. Whenever the output is low, a low-impedance path is provided between DISCH and GND. All unused inputs should be tied to an appropriate logic level to prevent false triggering.

While the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC551 exhibits greatly reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling capacitors required by the NE555.

The TLC551C is characterized for operation from 0°C to 70°C.




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