DescriptionThe main part of this circuit TL7705 is a reference voltage source, which consists of a very stable, temperature-compensated band gap reference. An external capacitor (typ. 0.1 mF) must be connected to the voltage output Vref, to reduce the influence of fast transients in the supply vol...
TL7705: DescriptionThe main part of this circuit TL7705 is a reference voltage source, which consists of a very stable, temperature-compensated band gap reference. An external capacitor (typ. 0.1 mF) must b...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
The main part of this circuit TL7705 is a reference voltage source, which consists of a very stable, temperature-compensated band gap reference. An external capacitor (typ. 0.1 mF) must be connected to the voltage output Vref, to reduce the influence of fast transients in the supply voltage. The voltage at the TL7705 SENSE input is divided by a resistor divider and compared with the reference voltage by a comparator. To achieve high accuracy, this divider is adjusted at wafer probe. When the input voltage is sensed to be lower than the threshold voltage, the TL7705 thyristor is triggered, which discharges the timing capacitor C t . It is also possible to fire the thyristor via the RESIN input by a logic level (TTL level, active low). The thyristor is turned off again when either the voltage at the SENSE input (or RESIN input) increases beyond the threshold, or - during short supply voltage drops - the discharge current of the capacitor becomes lower than the hold current of the thyristor.
Thereafter, the TL7705 capacitor is recharged by a current source 100 mA, the charge time being calculated as follows:
t C d t= 13 ×104×Ct Ct in F, t in s
The magnitude of charge current and therefore also the delay t d time is determined by the tolerance of the resistors in the integrated circuit. These tolerances TL7705, caused by the semiconductor manufacturing process, are not negligible. Therefore the delay time may vary -50 % to +100 %. However, for the applications discussed here this will not be a restriction. The diagram in figure 3 shows the typical delay time versus the capacitance of the external capacitor Ct.