TISPPBL2SD

The TISPPBL2S is a dual forward-conducting buffered p-gate overvoltage protector. It is designed to protect the Ericsson Components PBL 3xxx family of SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISPPBL2S limits voltages that exceed the SLIC supply rail levels.

The SLIC line driver section TISPPBL2S is typically powered from 0 V (ground) and a negative voltage in the region of -10 V to -85 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will track the negative supply
voltage the overvoltage stress on the SLIC is minimised.

Positive overvoltages TISPPBL2S are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage ground referenced on-state condition. As the overvoltagesubsides the high holding current of the crowbar prevents d.c. latchup. The TISPPBL2S buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction.

These monolithic protection devices TISPPBL2S are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The TISPPBL2S is the TISPPBL2D with a different pinout. The feed-through Ring (leads 4 - 5) and Tip (leads 1 - 8) connections have been replaced by single Ring (lead 4) and Tip (lead 1) connections. This increases package creepage distance of the biased to ground connections from about 0.7 mm to over 3 mm.