TI380C30A

Features: Single-Chip Token-Ring Solution IBME Token-Ring NetworkE Compatible Compatible With ISO/IEC IEEE Std 802.5:1992 Token-Ring Access-Method and Physical-Layer Specifications Compatible With TI380FPA PacketBlasterE Glueless Memory Interface Digital Phase-Locked Loop (PLL) Precise Control of...

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SeekIC No. : 004518979 Detail

TI380C30A: Features: Single-Chip Token-Ring Solution IBME Token-Ring NetworkE Compatible Compatible With ISO/IEC IEEE Std 802.5:1992 Token-Ring Access-Method and Physical-Layer Specifications Compatible With T...

floor Price/Ceiling Price

Part Number:
TI380C30A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

 Single-Chip Token-Ring Solution
IBME Token-Ring NetworkE Compatible
Compatible With ISO/IEC IEEE Std 802.5:1992 Token-Ring Access-Method and Physical-Layer Specifications
Compatible With TI380FPA PacketBlasterE
Glueless Memory Interface
Digital Phase-Locked Loop (PLL)
  Precise Control of Bandwidths
  Improved Jitter Tolerance
  Minimizes Accumulated Phase Slope
Phantom Drive for Physical Insertion Onto Ring
Differential Line Receiver With Level-Dependent Frequency Equalization
Low-Impedance Differential Line Driver to Ease Transmit-Filter Design
On-Chip Watchdog Timer
Internal Crystal Oscillator for Reference-Clock Generation
Expandable LAN-Subsystem Memory up to 2M Bytes
32-Bit Host Address Bus
80x8x or 68xxx-Type Bus and Memory Organization
Dual-Port Direct Memory Access (DMA) and Direct Input/Output Transfers to Host Bus
Supports 8- or 16-Bit Pseudo-Direct Memory Access (PDMA) Operation
Electrostatic Discharge (ESD) Protection Exceeds 2 kV (All Pins)
0.8-mm CMOS Technology
Token-Ring Features
16- or 4-Megabit-Per-Second (Mbit/s) Data Rates
Supports up to 18K-Byte Frame Size (16 Mbit/s Only)
Supports Universal and Local Addressing
  Early Token-Release Option (16 Mbit/s Only)
  Built-In Real-Time Error Detection
  Automatic Frame-Buffer Management
  2-MHz to 33-MHz System-Bus Clock
  Slow-Clock Low-Power Mode
   176-Pin Thin Quad Flat Package



Pinout

  Connection Diagram


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