THS5641

Features: ·Member of the Pin-Compatible CommsDACE Product Family·100 MSPS Update Rate·8-Bit Resolution·Signal-to-Noise and Distortion Ratio (SINAD) at 5 MHz: 50 dB·Integral Nonlinearity INL: 0.25 LSB·Differential Nonlinearity DNL: 0.25 LSB·1 ns Setup/Hold Time·Glitch Energy: 5 pV-s·Settling Time t...

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THS5641 Picture
SeekIC No. : 004518909 Detail

THS5641: Features: ·Member of the Pin-Compatible CommsDACE Product Family·100 MSPS Update Rate·8-Bit Resolution·Signal-to-Noise and Distortion Ratio (SINAD) at 5 MHz: 50 dB·Integral Nonlinearity INL: 0.25 LS...

floor Price/Ceiling Price

Part Number:
THS5641
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·Member of the Pin-Compatible CommsDACE Product Family
·100 MSPS Update Rate
·8-Bit Resolution
·Signal-to-Noise and Distortion Ratio (SINAD) at 5 MHz: 50 dB
·Integral Nonlinearity INL: 0.25 LSB
·Differential Nonlinearity DNL: 0.25 LSB
·1 ns Setup/Hold Time
·Glitch Energy: 5 pV-s
·Settling Time to 0.1%: 35 ns
·Differential Scalable Current Outputs: 2 mA to 20 mA
·On-Chip 1.2-V Reference
·3-V and 5-V Single Supply Operation
·Straight Binary or Twos Complement Input
·Power Dissipation: 100 mW at 3.3 V, Sleep Mode: 17 mW at 3.3 V
·Package: 28-Pin SOIC and TSSOP



Pinout

  Connection Diagram


Specifications

Supply voltage range, AVDD (see Note 1)  . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . .0.3 V to 6.5 V
DVDD (see Note 2)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . 0.3 V to 6.5 V
Voltage between AGND and DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 0.5 V
Supply voltage range, AVDD to DVDD  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .6.5 V to 6.5 V
                                   CLK, SLEEP, MODE (see Note 2)  . . . . . . . . . . . . .  .0.3 V to DVDD + 0.3 V
                                   Digital input D7D0 (see Note 2)  . . . . . . . . . . . . .0.3 V to DVDD + 0.3 V
                                   IOUT1, IOUT2 (see Note 1)  . . . . . . . . . . . . . . . . . . . .1 V to AVDD + 0.3 V
                                   COMP1, COMP2 (see Note 1) . . . . . . . . . . . . . . . . . 0.3 V to AVDD + 0.3 V 
                                   EXTIO, BIASJ (see Note 1)  . . . . . . . . . . . . . . . . . .  0.3 V to AVDD + 0.3 V
                                   EXTLO (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 0.3 V
Peak input current (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .20 mA
Peak total input current (all inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..30 mA
Operating free-air temperature range, TA: THS5641I  . . . . . . . . . . . . . . . . . . . . . 40°C to 85°C
Storage temperature range  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds . . . . . . . . . . .. . . . . . . .260°C
NOTES: 1. Measured with respect to AGND.
             2. Measured with respect to DGND.



Description

The THS5641 is an 8-bit resolution digital-to-analog converter (DAC) optimized for video applications and digital data transmission in wired and wireless communication systems. The 8-bit DAC is a member of the CommsDAC series of high-speed, low-power CMOS digital-to-analog converters. The CommsDAC family consists of pin compatible 14-, 12-, 10-, and 8-bit DACs. THS5641 offers identical interface options, small outline package and pinout.

The THS5641 offers superior ac and dc performance while supporting update rates up to 100 MSPS. The THS5641 operates from an analog and digital supply of 3 V to 5.5 V. Its inherent low power dissipation of 100 mW ensures that the THS5641 is well suited for portable and low power applications. Lowering the full-scale current output reduces the power dissipation without significantly degrading performance. The device features a SLEEP mode, which reduces the standby power to approximately 17 mW, thereby optimizing the power consumption for system needs.

The THS5641 is manufactured in Texas Instruments advanced high-speed mixed-signal CMOS process. A current-source-array architecture combined with simultaneous switching shows excellent dynamic performance. On-chip edge-triggered input latches and a 1.2 V temperature compensated bandgap reference provide a complete monolithic DAC solution. The digital supply range of 3 V to 5.5 V supports 3 V and 5 V CMOS logic families. Minimum data input setup and hold times allow for easy interfacing with external logic. The THS5641 supports both a straight binary and twos complement input word format, enabling flexible interfacing with digital signal processors.

The THS5641 provides a nominal full-scale differential output current of 20 mA and >300 kW output impedance, supporting both single-ended and differential applications. The output current of THS5641 can be directly fed to the load (e.g., external resistor load or transformer), with no additional external output buffer required. An accurate on-chip reference and control amplifier allows the user to adjust this output current from 20 mA down to 2 mA, with no significant degradation of performance. THS5641 reduces power consumption and provides 20 dB gain range control capabilities. Alternatively, an external reference voltage and control amplifier may be applied in applications using a multiplying DAC.

The THS5641 is available in both a 28-pin SOIC and TSSOP package. The device is characterized for operation over the industrial temperature range of 40°C to 85°C.




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