THCT4502B

The THCT4502B is designed as one kind of monolithic DRAM system controller providing address multiplexing, timing, control and refresh / access arbitation functions to simplify the interface of dynamic RAMs to microprocessor systems. This device contains an 18-bit multiplexer that generates the address lines for the memory device from the 18-system address bits and provides the strobe sugnals required by the memory to decode the address.

Features of the THCT4502B are:(1)inputs are TTL and CMOS voltage compatible;(2)controls operation of 64K and 256K dynamic RAMs;(3)creates static RAM appearance;(4)one package contains address multiplexer, refresh control and timing control;(5)directly addresses and drives up to 2M byte of memory without external drivers;(6)refresh may e internally or externally initiated;(7)high-performance Si-gate MOS technology;(8)strap-selected wait state generation for microprocessor / memory speed matching;(9)3-state outputs allow multiport memory configuration;(10)dependable Texas instruments quality and reliability. If you want to know more information such as the electrical characteristics about it, please download the datasheet in www.seekic.com or www.chinaicmart.com.