TDA5360

Features:

· 12 channels design for Single-stripe (SAL and GMR) Read / Thin-film Write heads.
· Design target 350 Mbps, for d=0 (16 / 17) rate code.
· Differential Hybrid sense Reader architecture.
· MR element biased by direct programmable constant Power or constant Current.
· Voltage driven Writer architecture.
· MR read / inductive write heads biased at ground level.
· Short rise and fall time with near rail to rail voltage swing.
· Dual power supplies : +5.0 V and -5.0 V.
· On-chip AC couplings eliminate MR head DC and DC offset voltage.
· Programmable 3-wire Serial Port Interface for programming (3.3 V and 5 V TTL / CMOS compatible).
· Extensive programmability of Write current wave overshoot.
· Programmable voltage / current mode write data input.
· Programmable voltage / current mode read data output.
· Programmable Read gain.
· Programmable Reader input impedance.
· Thermal asperity detection with programmable threshold.
· Thermal asperity compression with extensive programmability.
· High spurious-noise rejections.
· Internal Dummy Head available for MR heads protection during switchings.
· FAST mode available for short Write to Read mode transient.
· Sleep, Standby, Active, Servo Track Write, and Test modes available.
· Support servo writing.
· Write / Read Fault detection with fault code read back register and Fault masking capability.
· Low power-supplies fault protections.
· Short Write to Read Recovery, including DC settling.
· On-chip digitizing of Temperature and MR element Resistance value.
· Vendor ID and chip revision register.
· Illegal Multiple Device Selected detection.
· 2 pads CS0 and CS1, hard wired, for separate activation for multiple pre-amplifiers operation.
· Requires one external resistor.


Application

Hard Disk Drive (HDD).


Specifications

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP	MAX.	UNIT
VCC	Positive Supply voltage range	note1	4.5	5.0	5.5	V
VEE	Negative Supply voltage range	note2	-4.5	-5.0	-5.5	V
VIH	High level CMOS input voltage		2.4		VCC	V
VIL	Low level CMOS input voltage		0		0.8	V
Vi(dif)(p-p) (Writer input)	Differential Peak to Peak input voltage High level PECL input voltage Low level PECL input voltage		0.4 2.4	0.7 3.2 2.8	1.5 VCC	V V V
Imode (Writer input)	Differential Peak to Peak input current High level input current Low level input current		0.4 -1.4	0.8 -1.2 -0.4	1.0 -0.1	mA mA mA
Tamb	Ambient temperature		0	55	70
Tj	Junction temperature	when reading when writing		70	110 130
RMR	MR element resistance		46	66	86	Ohm
Ll(tot)	Total lead inductance to the head	in each lead	-	17		nH
Rl(tot)	Total lead resistance to the head	in each lead	-	1.5		Ohm
VMR	Voltage accross MR element (RPx-RNx)				1	V
Vsig(dif)(p-p)	MR head input signal peak to peak voltage	differential	0.4	1	3	mVpp
Lwh	Write Head inductance	including lead		75		nH
Rwh	Write Head resistance	including lead	-	10		Ohm
Cwh	Write head capacitance	including lead
Rext	Reference resistor	Iref=Vref/Rext	9.9	10	10.0	k

Description

The +/- 5.0 volt pre-amplifier for HDD described here has been designed for 12 terminals, comprised of a SAL or GMR magneto-resistive reader and an inductive thin film writer. In read mode, the TDA5360 operates as a low noise differential preamplifier which senses resistance changes in the MR element that correspond to flux changes on the disk. In write mode, the circuit of TDA5360 operates as a thin film head current switch, driving the inductive element of the head.

The TDA5360 incorporates Read amplifiers with programmable gain and HF boosts, Write amplifiers, 3-wires Serial Interface, Digital-to-Analog Converters, Thermal Asperity Detector and Programmable Thermal Asperity Compressor, reference and control circuits of TDA5360 which operate on a Dual Supply Voltage of +/-5V (+/-10%).

The Read amplifier TDA5360 has programmable medium input impedance. The DC offset between the two terminals of the MR head is eliminated using on chip AC coupling. The bandwidth can be enhanced by using programmable high frequency gain-boost. Fast settling features of TDA5360 are used to keep the transients short. As an option, the Read amplifier may be left biased during writing, so as to reduce the duration of these transients even further.

The Write amplifier TDA5360 has a programmable current overshoot which may be added to the programmable steady state write current.
Fault protection of TDA5360 is provided for a variety of read or write unsafe conditions. For added data protection, internal pull up resistors are connected to RWN, CS0, CS1, STWN, WDP and WDN pins and pull down resistors are connected to SEN, SDATA, SCLK, DRN and BFAST pins, to prevent accidental writing due to open lines and to ensure the device will power up in a non-writing condition.

On-chip Digital to Analog converters for MR bias current or power and Write current are programmed via a 3 wire Serial Interface. Head selection, Mode control, Testing and Servo Writing of TDA5360 can also be programmed using the serial interface. In Sleep mode, the CMOS serial interface of TDA5360 is operationnal. Fig 2 shows the block diagram of the IC. Invalid head select codes disable the writer, select the dummy head and trigger the FLT output.