TC9337F

The TC9337F has a ROM area that holds application programs for digital filters such as equalizers, for dynamic range control of compressors, and for acoustic field control concert hall simulation. These application programs allow real-time digital processing of audio signals.Thanks to 64Kbit of built- in data delay (audio field control) RAM, no external RAM is necessary and the built-in voltage-controlled oscillator (VCO) allows easy phase-locked loop configuration.

Features of the TC9337F are:(1)built-in RAM for data delay:delay RAM:64Kbit (4096word x 16bit); (2)built-in VCO circuit; (3)coefficient data and offset data can be set or changed via a I2C-bus interface; (4)CMOS silicon technology for higher speed; (5)60 pin flat package; (6)24bit main bus.The clocks required for internal operations are generated by an built-in VCO.The signal input from the SYNC pin is used as a reference. Configure the phase-locked loop as shown in Figure 3. A phase-difference (PD) signal is output from the PD terminal.Input registers SIRO and SIR1 are selectable for either 16bit or 24bit data length. The channel clock (LRCK} and bit clock (BCK) signals can be externally input independently as the timing signals for the data input to registers SIRO and SIR1.

The absolute maximum ratings of the TC9337F can be summarized as:(1)power supply voltage:-0.3 to 6.0 V;(2)input voltage:-0.3 to Vdd+0.3V;(3)storage temperature:-55 to 150;(4)power dissipation:1250mW;(5)operating temperature:-40 to 85.At idle, the IFCK and IFDT signals are high-level. After the microcontroller is to be a start condition of transmission (When IFCK clock is high-level, microcontroller control to IFDT signal at low-level) and TC9337F become condition the receiver mode at received slave address 32h. After the TC9337F is appreciated salve address 32h, IFDT transmit to microcontroller at low-level.After the microcontroller transfer sub address (lbyte), continue transfer necessary data (2byte).There are 12 sub address (OFh-04h) used to control TC9337F from microcontroller.The end of the microcontroller transmitted end condition is to be finished.(When IFCK clock is high-level, microcontroller control to IFDT signal at high-level).The coefficient RAM has a 320word x 16bit structure, and data can be changed one word at a time during each sampling period by the microcontroller communication procedure. Using the interface buffer RAM, 16word can be overwritten during each sampling period.