TC9278P

DescriptionThe TC9278P is 2'nd order - modulation system 1bit DA converter incorporating an 8-times over sampling digital filter developed for digital audio equipment.Because the TC9278PIC is small package (SOP20, DIP20) and includes the de-emphasis filter has been incorporation, it is possible to...

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TC9278P: DescriptionThe TC9278P is 2'nd order - modulation system 1bit DA converter incorporating an 8-times over sampling digital filter developed for digital audio equipment.Because the TC9278PIC is small ...

floor Price/Ceiling Price

Part Number:
TC9278P
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/12

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Product Details

Description



Description

The TC9278P is 2'nd order - modulation system 1bit DA converter incorporating an 8-times over sampling digital filter developed for digital audio equipment.Because the TC9278P IC is small package (SOP20, DIP20) and includes the de-emphasis filter has been incorporation, it is possible to constitute reducing the size and cost of the DA converter.

Features of the TC9278P are:(1)built-in 8-times over sampling digital filter; (2)low voltage operate (3.3 V); (3)built-in digital de-emphasis filter; (4)over sampling ratio (OSR) is 192 fs; (5)sampling frequency(fs):44.1 kHz; (6)Support double speed operation.The clock required for internal operations is generated by connecting a crystal and condensers as shown in the diagram below.The IC will also operate when a system clock is input from an external source through the XI pin(pin 12). However, in this situation, due consideration must be given to the fact that waveform characteristics, such as fitter and rising/falling characteristics of the system clock, significantly affect the DA converter's noise distortion and the S/N ratio.

The absolute maximum ratings of the TC9278P can be summarized as:(1)supply voltage:-0.3 to 6.0 V;(2)input voltage:-0.3 to Vdd+0.3V;(3)storage temperature:-55 to 150;(4)power dissipation:300mW;(5)operating temperature:-35 to 85.DATA and the LRCK are loaded to the LSI internal shift registers on the BCK signal rising edge. It is consequently necessary for the DATA and LRCK signals to be synchronized and input on the BCK signal falling edge as indicated in the timing example below. BCK is available only 32 fs.Also, as DATA has been designed so that the 16 bits before the change point of LRCK are regarded as valid data, the data must be input with right-justified mode.In this circuits, output data waveform is shaped and forward and reverse signals of bit stream data are output to the outside through a buffer.By differentiating these forward signal and the reverse signal in the external analog circuit, DA conversion output of low distortion and high S/N ratio can be obtained.




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