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TC74AC125P

Features: • High speed: tpd = 4.0 ns (typ.) at VCC = 5 V• Low power dissipation: ICC = 8 A (max) at Ta = 25• High noise immunity: VNIH = VNIL = 28% VCC (min)• Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 transmission lines.• Balanc...

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TC74AC125P: Features: • High speed: tpd = 4.0 ns (typ.) at VCC = 5 V• Low power dissipation: ICC = 8 A (max) at Ta = 25• High noise immunity: VNIH = VNIL = 28% VCC (min)• Symmetrical out...

TC74AC125P Data Sheet

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Part Number:
TC74AC125P
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High speed: tpd = 4.0 ns (typ.) at VCC = 5 V
• Low power dissipation: ICC = 8 A (max) at Ta = 25
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
   Capability of driving 50 transmission lines.
• Balanced propagation delays: tpLH −∼ tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Pin and function compatible with 74F125/126


Pinout

Connection Diagram


Specifications

Characteristics Symbol Value Unit
Supply voltage range VCC -0.5~7.0 V
DC input voltage VIN −0.5 to VCC + 0.5 V
DC output voltage VOUT −0.5 to VCC + 0.5 V
Input diode current IIK ±20 mA
Output diode current IOK ±50 mA
DC output current IOUT ±50 mA
DC VCC / ground current ICC ±100 mA
Power dissipation PD 500 (DIP) (Note 2)/180 (SOP/TSSOP) mW
Storage temperature Tstg −65 to 150

Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.

Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.

Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).

Note 2: 500 mW in the range of Ta = −40 to 65. From Ta = 65 to 85 a derating factor of −10 mW/ should be
applied up to 300 mW.


Description

The TC74AC125P are advanced high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate and double-layer metal wiring C2MOS technology.

They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

The TC74AC125P requires the 3-state control input G to be set high to place the output into the high impedance state, whereas the TC74AC126 requires the control input to be set low to place the output into high impedance.

All inputs of the TC74AC125P are equipped with protection circuits against static discharge or transient excess voltage.




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