Features: • High speed: tpd = 3.2 ns (typ.) at VCC = 5 V• Low power dissipation: ICC = 4 A (max) at Ta = 25• High noise immunity: VNIH = VNIL = 28% VCC (min)• Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 transmission lines.• Balanc...
TC74AC04FT: Features: • High speed: tpd = 3.2 ns (typ.) at VCC = 5 V• Low power dissipation: ICC = 4 A (max) at Ta = 25• High noise immunity: VNIH = VNIL = 28% VCC (min)• Symmetrical out...
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Supply voltage range VCC ...................................−0.5 to 7.0 V
DC input voltage VIN ................................−0.5 to VCC + 0.5 V
DC output voltage VOUT........................... −0.5 to VCC + 0.5 V
Input diode current IIK............................................... ±20 mA
Output diode current IOK........................................... ±50 mA
DC output current IOUT .............................................±50 mA
DC VCC/ground current ICC .....................................±150 mA
Power dissipation PD ...500 (DIP) (Note 2)/180 (SOP/TSSOP) mW
Storage temperature Tstg ................................−65 to 150
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction.Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = −40 to 65. From Ta = 65 to 85 a derating factor of −10 mW/ should be applied up to 300 mW.
The TC74AC04FT is an advanced high speed CMOS INVERTER fabricated with silicon gate and double-layer metal wiring C2MOS technology.
TC74AC04FT achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.
The internal TC74AC04FT circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.All inputs are equipped with protection circuits against satic discharge or transient excess voltage.