Features: ` Organized as 4,194,304 words by 16 bits ` Dual power supplies(2.6 to 3.3 V for core and1.7 to 2.2 V for output buffer) ` Direct TTL compatibility for all inputs and outputs ` Deep power-down mode: Memory cell data invalid ` Page operation mode: Page read operation by 8 words ` Logic co...
TC51WKM616AXBN75: Features: ` Organized as 4,194,304 words by 16 bits ` Dual power supplies(2.6 to 3.3 V for core and1.7 to 2.2 V for output buffer) ` Direct TTL compatibility for all inputs and outputs ` Deep power-...
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SYMBOL |
RATING |
VALUE |
UNIT |
VDD |
Power Supply Voltage |
-1.0 to 3.6 |
V |
VDDQ |
Output Buffer Power Supply Voltage |
-1.0 to VDD +0.5(3.6V Max)M |
V |
VIN |
Input Voltage for Address and Control Pins |
-1.0 to 3.6M |
V |
VI/O |
Input/Output Voltage for I/O Pins |
-1.0 to VDDQ+ 0.5 |
V |
Topr. |
Operating Temperature |
-25 to 85 |
|
Tstrg. |
Storage Temperature |
-55 to 150 |
|
Tsolder |
Soldering Temperature (10 s) |
260 |
|
PD |
Power Dissipation |
0.6 |
W |
IOUT |
Short Circuit Output Current |
50 |
mA |
The TC51WKM616AXBN75 is a 67,108,864-bit pseudo static random access memory(PSRAM) organized as 4,194,304 words by 16 bits. Using Toshiba's CMOS technology and advanced circuit techniques, it provides high density, high speed and low power. The device uses dual power supplies(2.6 to 3.3 V for core and 1.7 to 2.2 V for CE1,OE, and output buffer). The TC51WKM616AXBN75 also features SRAM-like W/R timing whereby the device is controlled by WE on asynchronous. The device has the page access operation. Page size is 8 words. The TC51WKM616AXBN75 also supports deep power-down mode, realizing low-power standby.