TC514400APL-60

The TC514400APL-60 belongs to TC514400APL/AJL/ASJL/AZL family which is the new generation dynamic RAM organized 1,048,576 words by 4 bits. The TC514400APL-60 utilizes TOSHIBA's CMOS Silicon gate process technology as well as advanced circuit techniques to provide wide operating margins, both internally and to the system user. Multiplexed address inputs permit the TC514400APL-60 to be packaged in a standard 20 pin plastic DIP and 26/20 pin plastic SOJ and 20 pin plastic ZIP. The package size provides high system bit densities and is compatible with widely available automated testing and insertion equipment. System oriented features include single power supply of 5V±10% tolerance, direct interfacing capability with high performance logic families such as Schottky TTL.

The features of TC514400APL-60 can be summarized as (1)1,048,576 word by 4 bit organization; (2)fast access time and cycle time; (3)single power supply of 5V±10% with a built-in VBB generator; (4)low power, 660mW operating (TC514400APL/AJL/ASJL/AZL), 1.1mW MAX. standby; (5)output unlatched at cycle end allows two-dimensional chip selection; (6)read-modify-write, CAS before RAS refresh, RAS only refresh, hidden refresh, nible mode and test mode capability; (7)all inputs and output TTL compatible; (8)1024 refresh cycles/128ms; (9)package TC514400APL: DIP20-P-300C, TC514400AJL: SOJ26-P-350.

The absolute maximum ratings of TC514400APL-60 are (1)input voltage VIN: -1~7V; (2)output voltage VOUT: -1~7V; (3)power supply voltage VCC: -1~7V; (4)operating temperature TOPR: 0~70°C; (5)storage temperature TSTG: -55~150°C; (6)soldering temperature-time TSOLDER: 260·10°C·sec; (7)power dissipation PD: 700mW; (8)short circuit output current IOUT: 50mA.