TC4S71F

      The TC4S71F is 2-input positive logic OR gates.Gate output with inverter buffer improve the input-output characteristics and even if the load capacitance increases,it can be stopped the change of propagation time.
      What comes next is about the maximum ratings of TC4S71F.The V_DD (DC supply voltage) is from V_SS-0.5 TO V_SS+20 V.The V_IN (input voltage) is from V_SS-0.5 TO V_DD+0.5 V.The V_OUT (output voltage) is from V_SS-0.5 TO V_DD+0.5 V.The I_IN (DC input current) is ±10 mA.The P_D (power dissipation) is 200 mW.The T_opr (operating temperature range) is from -40 to 85.The T_stg (storage temperature range) is from -65 to 150.The lead temperature (10s) (T_L) is 260.Then is about the recommended operating conditions.The minimum V_DD (DC supply voltage) is 3 V and the maximum is 18 V.The minimum V_IN (input voltage) is 0 V and the maximum is V_DD V.
      There are the dynamic electrical characteristics of TC4S71F (Ta=25,V_SS=0 V,C_L=50 pF) to follow.The typical t_TLH (output transition time (low to high)) is 70 ns and the maximum is 200 ns at V_DD=5 V;The typical tTLH is 35 ns and the maximum is 100 ns at V_DD=10 V;The typical t_TLH is 30 ns and the maximum is 80 ns at V_DD=15 V.The typical t_THL (output transition time (high to low)) is 70 ns and the maximum is 200 ns at VDD=5 V;The typical tTHL is 35 ns and the maximum is 100 ns at V_DD=10 V;The typical t_THL is 30 ns and the maximum is 80 ns at V_DD=15 V.The typical t_pLH (propagation delay time (low to high)) is 65 ns and the maximum is 200 ns at V_DD=5 V.The typical t_pLH is 30 ns and the maximum is 100 ns at V_DD=10 V.The typical t_pLH is 25 ns and the maximum is 80 ns at V_DD=15 V.The typical t_pHL (propagation delay time (high to low)) is 65 ns and the maximum is 200 ns at V_DD=5 V.The typical t_pHL is 30 ns and the maximum is 100 ns at V_DD=10 V.The typical t_pHL is 25 ns and the maximum is 80 ns at V_DD=15 V.The typical C_IN (input capacitance) is 5 pF and the maximum is 7.5 pF.