T90FJR

Features:

• Module Interface
   2 full independent module capability
   Common Interface Standard compliant
       DVB_CI (CENELEC EN-50221)
       NRSS-B (SCTE IS-679 Part B)
       DAVIC v1.2 (CA0 interface)
   Memory PCMCIA compliance (R2)
       8-bit data access
       26-bit address Memory Card
   Attribute Memory access (CIS, Tupple)
   High speed capability
       Up to 20Mbits/s on Command Interface
       Up to 100Mbits/s on Transport Stream
   Polling and Interrupt modes
   Hot Insertion (Automatic and Reset VCC handling)
   3.3V or 5V I/O buffers
• PQFP 128 package
• Host microprocessor Interface
   Universal Control Signal Generator (UCSG)
   PC Card control signals generation
   Supports PowerPC, ARM, ST20, 68xxx, TMS, LSI 64008, TC81220F, IDTR3041 host microprocessors
   I2C port
       CIMaX™ Set-up
       Slot selection
   Cascade mode management (up to 4 CIMaX™)
   Chip Select bank and Interrupt facilities
   3.3V or 5V I/O buffers
• Digital Video Stream Interface
   MPEG II Transport Stream compliant
   3.3V or 5V I/O buffer for direct interface with FEC and DEMUX ICs


Specifications

Symbol	Description	Min Value	Max Value	Unit
	Storage Ambient temperature	- 50	150	°C
TA	Operating Ambient temperature	0	70	°C
VDD5	5V Supply voltage	-0.5	-0.5	V
VDD3	Core Supply voltage	-0.5	3.6	V
	I/O voltage	-0.5	VDD + 0.5	V

Description

The T90FJR, also called CIMaX™ controller is the hardware extension of SCM Microsystems' second generation Common Interface integration package (CI Pack+™). It enables CI Driver software to directly address two complete independent Common Interface modules.

As such, it contributes to offer an optimized, homogeneous and complete solution for digital TV receiver manufacturer that wants quickly to implement the Common Interface.

T90FJR includes the necessary I/Os to interface the MPEG Transport stream generated by the receiver demodulator and to daisy chain it through two modules and back it to the demultiplexer. Voltage level translators allow to avoid any additional component.

T90FJR interfaces with major digital TV receiver microprocessors. An I2C bus is used for initialization and module selection, while a Universal Control Signal Generator (UCSG)maps CPU control bus into Command Interface control signals. To minimize pin count, host address and data buses transit through external buffers that
are driven by CIMaX™.

T90FJR includes a memory mode that allows to use any of the two Common interface slots to read/write a 8-bit PC Card Memory card. This feature gives the receiver memory extension capability for software upgrade or better performance.