T89C5115

Features:

` 80C51CoreArchitecture
` 256BytesofOn-chipRAM
` 256BytesofOn-chipERAM
    -16-KBofOn-chipFlashMemor
    -DataRetention:10Yearsat8C
    -Read/WriteCycle:10
` 2KBytesofOn-chipFlashforBootloader
` 2KBytesofOn-chipEEPROM
    -Read/WriteCycle:100
` 14-sources4-levelInterrupts
` Three16-bitTimers/Counters
` FullDuplexUARTCompatible80C51
` MaximumCrystalFrequency40MHz
    -InX2Mode,20MHz(CPUcore,40MHz
` ThreeorFourPorts:16or20DigitalI/OLines
` Two-channel16-bitPCAwith:
    -PWM(8-bit
    -High-speedOutpu
    -TimerandEdgeCaptur
` DoubleDataPointer
` 21-bitWatchDogTimer(7ProgrammableBits)
` A10-bitResolutionAnalogtoDigitalConverter(ADC)with8MultiplexedInputs
` PowerSavingModes:
    -IdleMod
    -Power-downMod
`PowerSupply:5V!à10%(or3^(1)_±10%
`TemperatureRange:Industrial(-40 to+85C)
` Packages:SOIC28,PLCC28,VQFP32


Application

Softwarecantakeadvantageoftheadditionaldatapointerstobothincreasespeedand reducecodesize,forexample,blockoperations(copy,compare!-)arewellservedb
usingonedatapointerasa!°source!±pointerandtheotheroneasa!°destination!±poin
Hereafterisanexampleofblockmoveimplementationusingthetwopointersandcoded
inassembler.ThelatestCcompilertakesalsoadvantageofthisfeaturebyproviding
enhancedalgorithmlibraries.

TheINCinstructionisashort(2bytes)andfast(6machinecycle)waytomanipulatethe
DPSbitintheAUXR1register.However,notethattheINCinstructiondoesnotdirectly
forcetheDPSbittoaparticularstate,butsimplytogglesit.Insimpleroutines,suchas
theblockmoveexample,onlythefactthatDPSistoggledinthepropersequencemat-
ters,notitsactualvalue.Inotherwords,theblockmoveroutineworksthesamewhether
DPSis'0'or'1'onentry.


Specifications

AmbiantTemperatureUnderBias:
I=industrial....................................................-40to85
StorageTemperature.................................-65Cto+150
VoltageonV_CC fromV_SS .................................-0.5Vto+6V
VoltageonAnyPinfromV_SS ....................-0.5VtoV +0.2V_CC
PowerDissipation........................................................1W


Description

The T89C5115is a high performance Flash version of the 80C51 single chip 8-bit microcontrollers.It contains a 16-KB Flash memory block for program and data. The 16-KB Flash memory can beprogramm edeither in parallel mode or in seria mode with  the ISP capability or with soft ware.The programming voltage is internally generated from the standard VCC pin.

The T89C5115 retains all features of the 80C52 with 256 bytes of internal RAM, a 7- source 4level interrupt controller and threetimer/counters.Inaddition, theT89C5115 has a 10-bitA/Dconverter, a2-KB Boot Flash memory,2-KBEEPROM for data , a Program mable Counter Array , an ERAM of 256bytes , a Hard ware Watch Dog Timer and amor ever satile serial channel that facilitates multiprocessor communication (EUART). The fully static design of the T89C5115 reduces system power consumption bybringing the clock frequency down toany value,evenDC,without loss of data.

The T89C5115 hast wosof tware-selectable mode sofre duced activity and an 8bit  clock prescaler for further reduction inpow ercon sumption. In the idlemode the CPU is frozen while the peripherals an dtheinterrupt syste marestill operating. In the power-down mode the RAMissaved and all oth erfunctions are in operative.

Theadded feature sof the T89C5115 make it more powerful for applications that need A/D conversion, pulse width modulation,high speedI/O and counting cap abilities such as indust rialcontrol, consumer goods,alarms,motorcontrol,etc.Whilere main- ingfully compatible with the 80C52 it offer sasuperset of this standard microcontroller.