Features: ` 5 V only` Low-power, latch-up-free CMOS technology- 37 mW/channel typical operating powerdissipation- 1 mW/channel typical powerdown dissipation` Automatic master clock frequency selection- 2.048 MHz or 4.096 MHz` On-chip sample and hold, autozero, and precision voltage reference` Diff...
T7504: Features: ` 5 V only` Low-power, latch-up-free CMOS technology- 37 mW/channel typical operating powerdissipation- 1 mW/channel typical powerdown dissipation` Automatic master clock frequency selecti...
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Parameter |
Symbol |
Min |
Max |
Unit |
Storage Temperature Range |
Tstg |
55 |
150 |
°C |
Power Supply Voltage |
VDD |
6.5 |
V | |
Voltage on Any Pin with Respect to Ground |
0.5 |
0.5 + VDD |
V | |
Maximum Power Dissipation (package limit) |
PD |
600 |
mW |
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.
The T7504 and T5504 devices are single-chip, fourchannelm-law/A-law PCM codecs with filters. These integrated circuits provide analog-to-digital and digital-to-analog conversion. They provide the transmit and receive filtering necessary to interface a voice telephone circuit to a time-division multiplexed system. These devices are available in 28-pin PLCCs. The T7504 is also available in a 44-pin MQFP.
The T5504 differs from the T7504 in its timing mode. The T5504 operates in the nondelay timing mode (digital data valid when frame sync goes high), and the T7504 operates in the delayed timing mode (digital data is valid one clock cycle after frame sync goes high) (see Figures 6-9).