Features: · Industry-standard x 16 pinouts and timing functions.· Single 5V (±10%) power supply.· All device pins are TTL- compatible.· 512-cycle refresh in 8ms.· Refresh modes:RAS only,CAS BEFORERAS (CBR) and HIDDEN.· Conventional FAST PAGE MODE access cycle.· BYTE WRITE and BYTE READ access cycl...
T224160B: Features: · Industry-standard x 16 pinouts and timing functions.· Single 5V (±10%) power supply.· All device pins are TTL- compatible.· 512-cycle refresh in 8ms.· Refresh modes:RAS only,CAS BEFORERA...
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· Industry-standard x 16 pinouts and timing functions.
· Single 5V (±10%) power supply.
· All device pins are TTL- compatible.
· 512-cycle refresh in 8ms.
· Refresh modes: RAS only, CAS BEFORE RAS (CBR) and HIDDEN.
· Conventional FAST PAGE MODE access cycle.
· BYTE WRITE and BYTE READ access cycles.
Voltage on Any pin Relative to VSS............... -1V to 7V
Operating Temperature, Ta (ambient)..0°C to +70°C
Storage Temperature (plastic)........ -55°C to +150°C
Power Dissipation .................................................1.2W
Short Circuit Output Current.................................50mA
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
The T224160B is a randomly accessed solid state memory containing 4,194,304 bits organized in a x16 configuration. The T224160B has both BYTE WRITE and WORD WRITE access cycles via two CAS pins. It offers Fast Page mode operation
The T224160B CAS function and timing are determined by the first CAS to transition low and by the last to transition back high. Use only one of the two CAS and leave the other staying high during WRITE will result in a BYTE WRITE. CASL transiting low in a WRITE cycle will write data into the lower byte (IO1~IO8), and CASH transiting low