Si5013

Features: · Supports OC-12/3, STM-4/1· DSPLL™ technology· Jitter generation 2.3 mUIrms (typ)· Small footprint: 5 x 5 mm· Reference and reference-less operation supported· Loss-of-signal level alarm· Data slicing level control· 10 mVPP differential sensitivity· 3.3 V supplyApplication· SONET/...

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SeekIC No. : 004490404 Detail

Si5013: Features: · Supports OC-12/3, STM-4/1· DSPLL™ technology· Jitter generation 2.3 mUIrms (typ)· Small footprint: 5 x 5 mm· Reference and reference-less operation supported· Loss-of-signal level ...

floor Price/Ceiling Price

Part Number:
Si5013
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

· Supports OC-12/3, STM-4/1
· DSPLL™ technology
· Jitter generation 2.3 mUIrms (typ)
· Small footprint: 5 x 5 mm
· Reference and reference-less operation supported
· Loss-of-signal level alarm
· Data slicing level control
· 10 mVPP differential sensitivity
· 3.3 V supply



Application

· SONET/SDH/ATM routers
· Add/drop multiplexers
· Digital cross connects
· Board level serial links
· SONET/SDH test equipment
· Optical transceiver modules
· SONET/SDH regenerators



Pinout

  Connection Diagram


Specifications

Parameter Symbol Value Unit
DC Supply Voltage VDD -0.5 to 3.5 V
LVTTL Input Voltage VDIG -0.3 to 3.6 V
Differential Input Voltages VDIF -0.3 to (VDD+ 0.3) V
Maximum Current any output PIN   ±50 mA
Operating Junction Temperature TJCT -55 to 150
Storage Temperature Range TSTG -55 to 150
ESD HBM Tolerance (100 pf, 1.5 k)

  1 kV

Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional  peration should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.




Description

The Si5013 is a fully-integrated, high-performance limiting amplifier (LA) and clock and data recovery (CDR) IC for high-speed serial communication systems. It derives timing information and data from a serial input at OC-12/3 and STM-4/1 rates. Use of an external reference clock is optional. Silicon Laboratories® DSPLL™ technology eliminates sensitive noise entry points, thus making the PLL less susceptible to board-level interaction and helping to ensure optimal jitter performance.

The Si5013 represents a new standard in low jitter, low power, small size, and integration for high-speed LA/CDRs. It operates from a 3.3 V supply over the industrial temperature range (40 to 85 °C).




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