SY69753L

The SY69753L is a complete Clock Recovery and Data Retiming integrated circuit for OC-3/STS-3 applications at 155Mbps NRZ. The SY69753L  is ideally suited for SONET/ SDH/ATM applications and other high-speed data transmission systems.

Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference.The SY69753L also includes a link fault detection circuit.Data sheets and support documentation can be found on Micrel's web site at www.micrel.com.