MOSFET 20V 40A 71W
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Transistor Polarity : | N-Channel | Drain-Source Breakdown Voltage : | 20 V | ||
Gate-Source Breakdown Voltage : | +/- 12 V | Continuous Drain Current : | 40 A | ||
Resistance Drain-Source RDS (on) : | 8.5 mOhms | Configuration : | Single | ||
Maximum Operating Temperature : | + 175 C | Mounting Style : | SMD/SMT | ||
Package / Case : | TO-252-3 | Packaging : | Reel |
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) | |||||
Parameter | Symbol | Test Conditions | Simulated Data |
Measured Data |
Unit |
Static | |||||
Gate Threshold Voltage | VGS(th) | VDS = VGS, ID = 250 A | 0.86 | V | |
On-State Drain Currenta | ID(on) | VDS = 5 V, VGS = 4.5 V | 339 | A | |
Drain-Source On-State Resistancea | rDS(on) | VGS = 4.5 V, ID = 20 A | 0.0065 | 0.0068 | |
VGS = 4.5V, ID = 20A, TJ = 150°C | 0.0106 | 0.0104 | |||
VGS = 2.5V, ID =20 A |
0.012 | 0.011 | |||
Forward Voltagea | VSD | IS = 100 A, VGS = 0 V | 0.90 | 1.2 | V |
Dynamicb | |||||
Input Capacitance | Ciss | VGS = 0 V, VDS = 25 V, f = 1 MHz | 2753 | 2660 | pF |
Output Capacitance | Coss | 768 | 730 | ||
Reverse Transfer Capacitance | Crss | 304 | 375 | ||
Total Gate Chargec | Qg | VDS = 10 V, VGS = 4.5 V, ID = 40 A | 26 | 26 | nC |
Gate-Source Chargec | Qgs | 5 | 5 | ||
Gate-Drain Chargec | Qgd | 7 | 7 | ||
Turn-On Delay Timec | td(on) | VDD = 10 V, RL = 0.25 ID= 40A, VGEN =4.5 V, RG = 2.5 |
19 | 20 | ns |
Rise Timec | tr | 30 | 120 | ||
Turn-Off Delay Timec | td(off) | 76 | 45 | ||
Fall Timec | tf | 49 | 20 | ||
Source-Drain Reverse Recovery Time | trr | IF = 40A, di/dt = 100 A/s | 31 | 35 |
The attached spice model of the SUD40N02-08 describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0 to 10V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.
A novel gate-to-drain feedback capacitance network of the SUD40N02-08 is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.