STU6NA90

Features: TYPE VDSS RDS(on) ID STU6NA90 900 V < 2 5.8 A` TYPICAL RDS(on) = 1.5 ` ± 30V GATE TO SOURCE VOLTAGE RATING` REPETITIVE AVALANCHE TESTED` LOW INTRINSIC CAPACITANCE` 100% AVALANCHE TESTED` GATE CHARGE MINIMIZED` REDUCED THRESHOLD VOLTAGE SPREADApplication· ...

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SeekIC No. : 004508933 Detail

STU6NA90: Features: TYPE VDSS RDS(on) ID STU6NA90 900 V < 2 5.8 A` TYPICAL RDS(on) = 1.5 ` ± 30V GATE TO SOURCE VOLTAGE RATING` REPETITIVE AVALANCHE TESTED` LOW INTRINSIC CAPA...

floor Price/Ceiling Price

Part Number:
STU6NA90
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

TYPE
VDSS
RDS(on)
ID
STU6NA90
900 V
< 2
5.8 A

` TYPICAL RDS(on) = 1.5
` ± 30V GATE TO SOURCE VOLTAGE RATING
` REPETITIVE AVALANCHE TESTED
` LOW INTRINSIC CAPACITANCE
` 100% AVALANCHE TESTED
` GATE CHARGE MINIMIZED
` REDUCED THRESHOLD VOLTAGE SPREAD



Application

· HIGH CURRENT, HIGH SPEED SWITCHING
· SWITCH MODE POWER SUPPLIES (SMPS)
· CONSUMER AND INDUSTRIAL LIGHTING
· DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES (UPS)



Specifications

Symbol
Parameter
Value
Unit
VDS
Drain-source Voltage (VGS = 0)
900
V
VDGR
Drain- gate Voltage (RGS = 20 k)
900
V
VGS
Gate-source Voltage
±30
V
ID
Drain Current (continuous) at Tc = 25
5.8
A
ID
Drain Current (continuous) at Tc = 100
3.7
A
IDM(`)
Drain Current (pulsed)
23.2
A
Ptot
Total Dissipation at Tc = 25
145
W
Derating Factor
1.16
W/
Tstg
Storage Temperature
-65 to 150
Tj
Max. Operating Junction Temperature
150

(`) Pulse width limited by safe operating area


Description

The Max220TM package STU6NA90 is a new high volume power package exibiting the same footprint as the industry standard TO-220, but designed to accomodate much larger silicon chips, normally supplied in bigger packages. The increased die capacity STU6NA90 makes the device ideal to reduce component count in multiple paralleled TO-220 designs and save board space with respect to arger packages.




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