ST90135

`Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW and HALT modes
`0 - 16 MHz Operatio`@ 5V±10%, -40°C to +85°C and 0°C to +70°C Operating Temperature Ranges
`0 - 14 MHz Operatio`@ 3V±10% and 0°C to +70°C Operating Temperature Range
`Fully Programmable PLL Clock Generator, with Frequency Multiplicatio`and low frequency, low cost external crystal
`Minimum 8-bit Instructio`Cycle time: 83ns - (@ 24 MHz internal clock frequency)
`Minimum 16-bit Instructio`Cycle time: 250ns - (@ 24MHz internal clock frequency)
`Internal Memory: EPROM/OTP/ROM 16/24/32/48/64K bytes ROMless versio`available RAM 512/768/1K/1.5K/2K bytes
`Maximum External Memory: 64K bytes
`224 general purpose registers available as RAM, accumulators or index pointers (register file)
`80-pi`Plastic Quad Flat Package and 80-pin Thi`Quad Flat Package
`67 fully programmable I/O bits
`8 external and 1 Non-Maskable Interrupts
`DMA Controller and Programmable Interrupt Handler
`Single Master Serial Peripheral Interface
`Two 16-bit Timers with 8-bit Prescaler, one usable as a Watchdog Timer (software and hardware)
`Three (ST90158) or two (ST90135) 16-bit Multifunctio`Timers, each with a`8 bit prescaler, 12 operating modes and DMA capabilities
`8 channel 8-bit Analog to Digital Converter, with Automatic voltage monitoring capabilities and external reference inputs
`Two (ST90158) or one (ST90135) Serial Communicatio`Interfaces with asynchronous, synchronous and DMA capabilities
`Rich Instructio`Set with 14 Addressing modes
`Division-by-Zero trap generation
`Versatile Development Tools, including Assembler, Linker, C-compiler, Archiver, Source Level Debugger and Hardware Emulators with Real-Time Operating System available from Third Parties

Note: Stresses above those listed as "absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. All voltages are referenced to VSS

The ST90158 and ST90135 microcontrollers are developed and manufactured by STMicroelectronics using a proprietary n-well CMOS process.

Their performance derives from the use of a flexible 256-register programming model for ultra-fast context switching and real-time event response.

The intelligent on-chip peripherals offload the ST90135 core from I/O and data management processing tasks allowing critical application tasks to get the maximum use of core resources. The new-generation ST9 MCU devices now also support low power consumption and low voltage operation for power-efficient and low-cost embedded systems.

1.1.1 ST90135+ Core The advanced Core consists of the Central Processing Unit (CPU), the Register File, the Interrupt and DMA controller, and the Memory Management Unit. The MMU allows addressing of up to 4 Megabytes of program and data mapped into a single linear space.

Four ST90135 independent buses are controlled by the Core: a 16-bit memory bus, an 8-bit register data bus, an 8-bit register address bus and a 6-bit interrupt/ DMA bus which connects the interrupt and DMA controllers in the on-chip peripherals with the core.

This multiple bus architecture makes the ST90135 family devices highly efficient for accessing on and offchip emory and fast exchange of data with the on-chip peripherals.

The general-purpose registers can be used as accumulators, index registers, or address pointers.

Adjacent register pairs make up 16-bit registers for addressing or 16-bit processing. Although the ST90135 has an 8-bit ALU, the chip handles 16-bit operations, including arithmetic, loads/stores, and memory/ register and memory/memory exchanges.