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ST72682

Features: ` USB 2.0 interface compatible with mass storage device class Integrated USB 2.0 PHY Supports USB high speed and full speed Suspend and Resume operations` Mass storage controller interface (MSCI) Supports all types of NAND Flash devices including ST, Hynix, Samsung, Toshiba, Renesas,...

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SeekIC No. : 004506756 Detail

ST72682: Features: ` USB 2.0 interface compatible with mass storage device class Integrated USB 2.0 PHY Supports USB high speed and full speed Suspend and Resume operations` Mass storage controller interf...

ST72682 Data Sheet

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Part Number:
ST72682
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/26

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Product Details

Description



Features:

` USB 2.0 interface compatible with mass storage device class Integrated USB 2.0 PHY Supports USB high speed and full speed Suspend and Resume operations
` Mass storage controller interface (MSCI) Supports all types of NAND Flash devices including ST, Hynix, Samsung, Toshiba, Renesas, and Micron Reed-Solomon encoder/decoder: on-thefly correction (4 bytes of a 512-byte block) Flash identification support Up to 21 Mbyte/s for read and 11 Mbyte/s for write operations in dual channel
` Embedded ST7 8-bit MCU
` Supply management 3.3V operation Integrated 3.3 -1.8 V voltage regulator
` USB 2.0 low-power device compliant Less than 100 mA during write operation with two NAND Flash devices
Less than 500 A in suspend mode
` Clock management Integrated PLL for generating core and USB 2.0 clock sources using external 12 MHz crystal
` AutoRun CDROM partition support
` Data protection Write protect switch control Public/Private partitions support
` Bootability support (HDD mode)
` Production tool device configurability: USB vendor ID/product ID (VID/PID), serial number and USB strings with foreign language support SCSI strings One or two LED outputs Adjustable NAND Flash bus frequency to reach highest performance
` Code update in the NAND Flash
` LQFP64 10x10 lead-free package
` Development support Complete reference design including schematics, BOM and gerber files
` Supports Windows (Vista, XP, 2000, ME), Linux and MacOS. Drivers available for Windows 98 SE


Pinout

Connection Diagram


Specifications

Stresses above those listed as "absolute maximum ratings" may cause permanent damage to the Device. This is a stress rating only and functional operation of the Device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.


Symbol

Ratings

Maximum value

Unit

VDD33 - VSS Supply voltage

4.0

V

VIN(1)(2) Input voltage on any other pin

VSS−0.3 to
VDD33+0.3

V

VESD(HBM) Electrostatic discharge voltage (Human Body
Model)		 see Section 7.6.3: Absolute
Maximum Ratings (Electrical
Sensitivity)












1. Directly connecting the RESET and I/O pins to VDD33 or VSS could damage the Device if an unintentional internal reset is generated or an unexpected change of the I/O configuration occurs (for example, due to a corrupted program counter). To guarantee safe operation, this connection has to be done through a pull-up or pull-down resistor (typical: 4.7k for RESET, 10k for I/Os). For the same reason, unused I/O pins must not be directly tied to VDD33 or VSS.

2. When the current limitation is not possible, the VIN absolute maximum rating must be respected, otherwise refer to IINJ(PIN) specification. A positive injection is induced by VIN>VDD33 while a negative injection is induced by VIN<VSS.



Description

The ST72682 is a USB 2.0 high-speed Flash drive controller. The USB 2.0 high-speed interface includes PHY and function and supports USB 2.0 mass storage device class.

The Mass storage controller interface (MSCI), combined with the Reed-Solomon encoder/decoder on-the-fly correction (4 bytes on 512-byte data blocks), provides a flexible high transfer rate solution for interfacing a wide of range NAND Flash memory devices.

The internal 60 MHz PLL driven by the 12 MHz oscillator is used to generate the 480 MHz frequency required for the USB 2.0 PHY.

The ST72682 8-bit CPU runs the application program from the internal ROM and RAM. USB data and patch code are stored in internal RAM.

The I/O ports provide allow to connect EEPROM, LEDs and a write protect switch control.

The internal 3.3 to 1.8 V voltage regulator provides the 1.8 V supply voltage to the digital part of the circuit.




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