DescriptionThe SP94308 analog to digital converter has been specially designed for use with NTSC or PAL video signals.A 1 V video signal is AC coupled to the device input, where it is DC clamped, amplified by fwo and fed through a buffer which drives the ADC input capacitance.The clock frequency a...
SP94308: DescriptionThe SP94308 analog to digital converter has been specially designed for use with NTSC or PAL video signals.A 1 V video signal is AC coupled to the device input, where it is DC clamped, am...
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The SP94308 analog to digital converter has been specially designed for use with NTSC or PAL video signals.A 1 V video signal is AC coupled to the device input, where it is DC clamped, amplified by fwo and fed through a buffer which drives the ADC input capacitance.The clock frequency and analog bandwidth of the SP94308 are compatible with both PAL and NTSC standards where conversion of luma or full composite video signals are required.
Features of the SP8602 are:(1)no sample and hold or input buffer required; (2)internal clock amplifier; (3)internal clamp circuit; (4)internal output latch; (5)6MHz min. analog bandwidth; (6)output levels are TTL/CMOS compatible; (7)0 to 70 temperature range; (8)full static protection; (9)on chip x2 amplifier and ADC buffer.The SP94308 combines a clamp circuit, sample and hold,x2 amplifier, ADC driver, video ADC and output latch that form a conventional 8-bit video digitising system.An on-chip clock amplifier allows the device to be clocked from low level sine or square wave signals. This reduces the possibility of patterning due to crosstalk.The device offers the flexibility for either sync clamping or black level clamping of the video signal.
The absolute maximum ratings of the SP94308 can be summarized as:(1)supply voltage:<12 V;(2)output current:<20mA;(3)junction temperature range:<150;(4)storage temperature:-65 to 150.When using a back porch clamping pulse, pin 4 should be decoupled to analog ground using a 100nF capacitor. The device will then self-bias this pin to-1.4V. This provides full digitisation of the video and its sync.It is also possible to adjust the voltage on pin 4 and reduce the reference voltage pin 10 to provide digitisation of the active video information only.If a clamp pulse is not readily available within the application it can be generated from the incoming video signal (see circuit shown in Fig.S). The variable resistor RV can be adjusted for different slice levels of the incoming video sync.