Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop
SN74S112ADR: Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop
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Number of Circuits : | 2 | Logic Family : | 74S | ||
Logic Type : | J-K Type Flip-Flop | Polarity : | Inverting/Non-Inverting | ||
Input Type : | Single-Ended | Output Type : | Differential | ||
Propagation Delay Time : | 7 ns | High Level Output Current : | - 1 mA | ||
Low Level Output Current : | 20 mA | Supply Voltage - Max : | 5.25 V | ||
Maximum Operating Temperature : | + 70 C | Mounting Style : | SMD/SMT | ||
Package / Case : | SOIC-16 | Packaging : | Reel |
Technical/Catalog Information | SN74S112ADR |
Vendor | Texas Instruments |
Category | Integrated Circuits (ICs) |
Mounting Type | Surface Mount |
Package / Case | 16-SOIC (3.9mm Width) |
Function | Set and Reset |
Number of Bits per Element | 1 |
Number of Elements | 2 - Dual |
Current - Output High, Low | 1mA, 20mA |
Output Type | Differential |
Trigger Type | Negative Edge |
Type | JK Type |
Packaging | Tape & Reel (TR) |
Operating Temperature | 0°C ~ 70°C |
Delay Time - Propagation | 4ns |
Frequency - Clock | 125MHz |
Voltage - Supply | 4.75 V ~ 5.25 V |
Drawing Number | 296; 4040047-4; D; 16 |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | SN74S112ADR SN74S112ADR |