Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop
SN74LVC112APWE4: Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop
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Number of Circuits : | 2 | Logic Family : | 74LV | ||
Logic Type : | J-K Flip-Flop | Polarity : | Inverting/Non-Inverting | ||
Input Type : | Single-Ended | Output Type : | Differential | ||
Propagation Delay Time : | 7.1 ns | High Level Output Current : | - 24 mA | ||
Low Level Output Current : | 24 mA | Supply Voltage - Max : | 3.6 V | ||
Maximum Operating Temperature : | + 85 C | Mounting Style : | SMD/SMT | ||
Package / Case : | TSSOP-16 | Packaging : | Tube |
Technical/Catalog Information | SN74LVC112APWE4 |
Vendor | Texas Instruments |
Category | Integrated Circuits (ICs) |
Mounting Type | Surface Mount |
Package / Case | 16-TSSOP |
Function | Set and Reset |
Number of Bits per Element | 1 |
Number of Elements | 2 - Dual |
Current - Output High, Low | 24mA, 24mA |
Output Type | Differential |
Trigger Type | Negative Edge |
Type | JK Type |
Packaging | Tube |
Operating Temperature | -40°C ~ 85°C |
Delay Time - Propagation | 1ns |
Frequency - Clock | 150MHz |
Voltage - Supply | 1.65 V ~ 3.6 V |
Drawing Number | 296; 4040064; PW; 8, 14, 16, 20, 24, 28 |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | SN74LVC112APWE4 SN74LVC112APWE4 |