Input Type
: Single-Ended
Mounting Style
: Through Hole
Packaging
: Tube
Logic Type
: D-Type Flip-Flop
Polarity
: Inverting/Non-Inverting
Output Type
: Differential
High Level Output Current
: - 0.4 mA
Low Level Output Current
: 8 mA
Maximum Operating Temperature
: + 70 C
Number of Circuits
: 4
Logic Family
: 74LS
Supply Voltage - Max
: 5.25 V
Package / Case
: PDIP-16
Propagation Delay Time
: 25 ns
Features: • Edge-Triggered D-Type Inputs
• Buffered-Positive Edge-Triggered Clock
• Clock to Output Delays of 30 ns
• Asynchronous Common Reset
• True and Complement Output
• Input Clamp Diodes Limit High Speed Termination EffectsPinout
DescriptionThe LSTTL/MSI SN74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH clock transition. Both true and complemented outputs of each flip-flop are provided. A Master Reset input resets all flip-flops, independent of the Clock or D inputs, when LOW.
The LS175 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families.
Parameters: | Technical/Catalog Information | SN74LS175N |
| Vendor | Texas Instruments |
| Category | Integrated Circuits (ICs) |
| Mounting Type | Through Hole |
| Package / Case | 16-DIP (300 mil) |
| Function | Master Reset |
| Number of Bits per Element | 4 |
| Number of Elements | 1 - Single |
| Current - Output High, Low | 400A, 8mA |
| Output Type | Differential |
| Trigger Type | Positive Edge |
| Type | D-Type Bus |
| Packaging | Tube |
| Operating Temperature | 0°C ~ 70°C |
| Delay Time - Propagation | 13ns |
| Frequency - Clock | 40MHz |
| Voltage - Supply | 4.75 V ~ 5.25 V |
| Drawing Number | 296; 4040049; N; 14, 16, 18, 20 |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | SN74LS175N
SN74LS175N
296 1648 5 ND
29616485ND
296-1648-5
|
SN74LS175N Data Sheet
