SN74AHCT74D

Flip Flops Dual w/Clear Preset

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SeekIC No. : 00428232 Detail

SN74AHCT74D: Flip Flops Dual w/Clear Preset

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Part Number:
SN74AHCT74D
Mfg:
Texas Instruments
Supply Ability:
5000

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Upload time: 2024/12/26

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Product Details

Quick Details

Number of Circuits : 2 Logic Family : 74AH
Logic Type : D-Type Flip-Flop Polarity : Inverting/Non-Inverting
Input Type : Single-Ended Output Type : Differential
Propagation Delay Time : 8.8 ns High Level Output Current : - 8 mA
Low Level Output Current : 8 mA Supply Voltage - Max : 5.5 V
Maximum Operating Temperature : + 85 C Mounting Style : SMD/SMT
Package / Case : SOIC-14 Packaging : Tube    

Description

Mounting Style : SMD/SMT
Supply Voltage - Max : 5.5 V
Number of Circuits : 2
Input Type : Single-Ended
Maximum Operating Temperature : + 85 C
Packaging : Tube
Logic Type : D-Type Flip-Flop
Polarity : Inverting/Non-Inverting
Output Type : Differential
Low Level Output Current : 8 mA
Package / Case : SOIC-14
Logic Family : 74AH
High Level Output Current : - 8 mA
Propagation Delay Time : 8.8 ns


Features:

` Inputs Are TTL-Voltage Compatible
` Latch-Up Performance Exceeds 250 mA Per ESD 17
` ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)



Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±50 mA
Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96°C/W
(see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80°C/W
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76°C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.



Description

The 'AHCT74 dual positive-edge-triggered devices are D-type flip-flops.

A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input of  'AHCT74  can be changed without affecting the levels at the outputs.




Parameters:

Technical/Catalog InformationSN74AHCT74D
VendorTexas Instruments
CategoryIntegrated Circuits (ICs)
Mounting TypeSurface Mount
Package / Case14-SOIC (3.9mm Width), 14-SOL
FunctionSet and Reset
Number of Bits per Element1
Number of Elements2 - Dual
Current - Output High, Low8mA, 8mA
Output TypeDifferential
Trigger TypePositive Edge
TypeD-Type
PackagingTube
Operating Temperature-40°C ~ 85°C
Delay Time - Propagation1ns
Frequency - Clock140MHz
Voltage - Supply4.5 V ~ 5.5 V
Drawing Number296; 4040047-3; D; 14
Lead Free StatusLead Free
RoHS StatusRoHS Compliant
Other Names SN74AHCT74D
SN74AHCT74D
296 4769 5 ND
29647695ND
296-4769-5



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