SN54/74LS373

The SN54/ 74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The SN54/ 74LS373 flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state.

The SN54/ 74LS374 is a high-speed, low-power Octal D-type Flip-Flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered Clock (CP) and Output Enable (OE) is common to all flip-flops. The SN54 /74LS374 is manufactured using advanced Low Power Schottky technology and is compatible with all Motorola TTL families.