Features: · 8-bit RISC microcontroller.· Dual instruction and data buses with Harvard architecture.· Fast operation: all microcontroller instructions (except branches) require one clock cycle. Branch instructions require two clock cycles.· Very compact design minimizes gate count.· 24 input and 48...
SLC1655: Features: · 8-bit RISC microcontroller.· Dual instruction and data buses with Harvard architecture.· Fast operation: all microcontroller instructions (except branches) require one clock cycle. Branc...
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· 8-bit RISC microcontroller.
· Dual instruction and data buses with Harvard architecture.
· Fast operation: all microcontroller instructions (except branches) require one clock cycle. Branch instructions require two clock cycles.
· Very compact design minimizes gate count.
· 24 input and 48 output I/O lines.
· General purpose, 8-bit timer/counter module.
· Powerdown/sleep mode for low power applications.
· Instruction ROM§: 512 x 12 bit. Can be configured as embedded ROM, or as an emulation ROM for software development purposes.
· General purpose registers (RAM): 24 bytes.
· 32 op-code instructions with easy-to-use application software environment.
· A large base of software, tools, and reference books are available.
· Microcontroller design written in the flexible VHDL hardware description language. The Silicore SLC1655 is delivered as a soft core, meaning that all VHDL source code and test benches are supplied.This allows the user to tweak the design for a particular application. Complete documentation is also provided.n Very portable design can be operated on a wide variety of FPGA and ASIC target devices.
· Straightforward synchronous design simplifies system integration.
· Very simple timing constraint definition.